// SPDX-License-Identifier: GPL-2.0+ /* * Comedi driver for National Instruments PCI-DIO-32HS * * COMEDI - Linux Control and Measurement Device Interface * Copyright (C) 1999,2002 David A. Schleef <[email protected]> */ /* * Driver: ni_pcidio * Description: National Instruments PCI-DIO32HS, PCI-6533 * Author: ds * Status: works * Devices: [National Instruments] PCI-DIO-32HS (ni_pcidio) * [National Instruments] PXI-6533, PCI-6533 (pxi-6533) * [National Instruments] PCI-6534 (pci-6534) * Updated: Mon, 09 Jan 2012 14:27:23 +0000 * * The DIO32HS board appears as one subdevice, with 32 channels. Each * channel is individually I/O configurable. The channel order is 0=A0, * 1=A1, 2=A2, ... 8=B0, 16=C0, 24=D0. The driver only supports simple * digital I/O; no handshaking is supported. * * DMA mostly works for the PCI-DIO32HS, but only in timed input mode. * * The PCI-DIO-32HS/PCI-6533 has a configurable external trigger. Setting * scan_begin_arg to 0 or CR_EDGE triggers on the leading edge. Setting * scan_begin_arg to CR_INVERT or (CR_EDGE | CR_INVERT) triggers on the * trailing edge. * * This driver could be easily modified to support AT-MIO32HS and AT-MIO96. * * The PCI-6534 requires a firmware upload after power-up to work, the * firmware data and instructions for loading it with comedi_config * it are contained in the comedi_nonfree_firmware tarball available from * https://www.comedi.org */ #define USE_DMA #include <linux/module.h> #include <linux/delay.h> #include <linux/interrupt.h> #include <linux/sched.h> #include <linux/comedi/comedi_pci.h> #include "mite.h" /* defines for the PCI-DIO-32HS */ #define WINDOW_ADDRESS … #define INTERRUPT_AND_WINDOW_STATUS … #define INT_STATUS_1 … #define INT_STATUS_2 … #define WINDOW_ADDRESS_STATUS_MASK … #define MASTER_DMA_AND_INTERRUPT_CONTROL … #define INTERRUPT_LINE(x) … #define OPEN_INT … #define GROUP_STATUS … #define DATA_LEFT … #define REQ … #define STOP_TRIG … #define GROUP_1_FLAGS … #define GROUP_2_FLAGS … #define TRANSFER_READY … #define COUNT_EXPIRED … #define WAITED … #define PRIMARY_TC … #define SECONDARY_TC … /* #define SerialRose */ /* #define ReqRose */ /* #define Paused */ #define GROUP_1_FIRST_CLEAR … #define GROUP_2_FIRST_CLEAR … #define CLEAR_WAITED … #define CLEAR_PRIMARY_TC … #define CLEAR_SECONDARY_TC … #define DMA_RESET … #define FIFO_RESET … #define CLEAR_ALL … #define GROUP_1_FIFO … #define GROUP_2_FIFO … #define TRANSFER_COUNT … #define CHIP_ID_D … #define CHIP_ID_I … #define CHIP_ID_O … #define CHIP_VERSION … #define PORT_IO(x) … #define PORT_PIN_DIRECTIONS(x) … #define PORT_PIN_MASK(x) … #define PORT_PIN_POLARITIES(x) … #define MASTER_CLOCK_ROUTING … #define RTSI_CLOCKING(x) … #define GROUP_1_SECOND_CLEAR … #define GROUP_2_SECOND_CLEAR … #define CLEAR_EXPIRED … #define PORT_PATTERN(x) … #define DATA_PATH … #define FIFO_ENABLE_A … #define FIFO_ENABLE_B … #define FIFO_ENABLE_C … #define FIFO_ENABLE_D … #define FUNNELING(x) … #define GROUP_DIRECTION … #define PROTOCOL_REGISTER_1 … #define OP_MODE … #define RUN_MODE(x) … #define NUMBERED … #define PROTOCOL_REGISTER_2 … #define CLOCK_REG … #define CLOCK_LINE(x) … #define INVERT_STOP_TRIG … #define DATA_LATCHING(x) … #define PROTOCOL_REGISTER_3 … #define SEQUENCE … #define PROTOCOL_REGISTER_14 … #define CLOCK_SPEED … #define PROTOCOL_REGISTER_4 … #define REQ_REG … #define REQ_CONDITIONING(x) … #define PROTOCOL_REGISTER_5 … #define BLOCK_MODE … #define FIFO_Control … #define READY_LEVEL(x) … #define PROTOCOL_REGISTER_6 … #define LINE_POLARITIES … #define INVERT_ACK … #define INVERT_REQ … #define INVERT_CLOCK … #define INVERT_SERIAL … #define OPEN_ACK … #define OPEN_CLOCK … #define PROTOCOL_REGISTER_7 … #define ACK_SER … #define ACK_LINE(x) … #define EXCHANGE_PINS … #define INTERRUPT_CONTROL … /* bits same as flags */ #define DMA_LINE_CONTROL_GROUP1 … #define DMA_LINE_CONTROL_GROUP2 … /* channel zero is none */ static inline unsigned int primary_DMAChannel_bits(unsigned int channel) { … } static inline unsigned int secondary_DMAChannel_bits(unsigned int channel) { … } #define TRANSFER_SIZE_CONTROL … #define TRANSFER_WIDTH(x) … #define TRANSFER_LENGTH(x) … #define REQUIRE_R_LEVEL … #define PROTOCOL_REGISTER_15 … #define DAQ_OPTIONS … #define START_SOURCE(x) … #define INVERT_START … #define STOP_SOURCE(x) … #define REQ_START … #define PRE_START … #define PATTERN_DETECTION … #define DETECTION_METHOD … #define INVERT_MATCH … #define IE_PATTERN_DETECTION … #define PROTOCOL_REGISTER_9 … #define REQ_DELAY … #define PROTOCOL_REGISTER_10 … #define REQ_NOT_DELAY … #define PROTOCOL_REGISTER_11 … #define ACK_DELAY … #define PROTOCOL_REGISTER_12 … #define ACK_NOT_DELAY … #define PROTOCOL_REGISTER_13 … #define DATA_1_DELAY … #define PROTOCOL_REGISTER_8 … #define START_DELAY … /* Firmware files for PCI-6524 */ #define FW_PCI_6534_MAIN … #define FW_PCI_6534_SCARAB_DI … #define FW_PCI_6534_SCARAB_DO … MODULE_FIRMWARE(…); MODULE_FIRMWARE(…); MODULE_FIRMWARE(…); enum pci_6534_firmware_registers { … }; /* main fpga registers (32 bit)*/ enum pci_6534_fpga_registers { … }; enum FPGA_Control_Bits { … }; #define TIMER_BASE … #ifdef USE_DMA #define INT_EN … #else #define INT_EN … #endif enum nidio_boardid { … }; struct nidio_board { … }; static const struct nidio_board nidio_boards[] = …; struct nidio96_private { … }; static int ni_pcidio_request_di_mite_channel(struct comedi_device *dev) { … } static void ni_pcidio_release_di_mite_channel(struct comedi_device *dev) { … } static int setup_mite_dma(struct comedi_device *dev, struct comedi_subdevice *s) { … } static int ni_pcidio_poll(struct comedi_device *dev, struct comedi_subdevice *s) { … } static irqreturn_t nidio_interrupt(int irq, void *d) { … } static int ni_pcidio_insn_config(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) { … } static int ni_pcidio_insn_bits(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_insn *insn, unsigned int *data) { … } static int ni_pcidio_ns_to_timer(int *nanosec, unsigned int flags) { … } static int ni_pcidio_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s, struct comedi_cmd *cmd) { … } static int ni_pcidio_inttrig(struct comedi_device *dev, struct comedi_subdevice *s, unsigned int trig_num) { … } static int ni_pcidio_cmd(struct comedi_device *dev, struct comedi_subdevice *s) { … } static int ni_pcidio_cancel(struct comedi_device *dev, struct comedi_subdevice *s) { … } static int ni_pcidio_change(struct comedi_device *dev, struct comedi_subdevice *s) { … } static int pci_6534_load_fpga(struct comedi_device *dev, const u8 *data, size_t data_len, unsigned long context) { … } static int pci_6534_reset_fpga(struct comedi_device *dev, int fpga_index) { … } static int pci_6534_reset_fpgas(struct comedi_device *dev) { … } static void pci_6534_init_main_fpga(struct comedi_device *dev) { … } static int pci_6534_upload_firmware(struct comedi_device *dev) { … } static void nidio_reset_board(struct comedi_device *dev) { … } static int nidio_auto_attach(struct comedi_device *dev, unsigned long context) { … } static void nidio_detach(struct comedi_device *dev) { … } static struct comedi_driver ni_pcidio_driver = …; static int ni_pcidio_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) { … } static const struct pci_device_id ni_pcidio_pci_table[] = …; MODULE_DEVICE_TABLE(pci, ni_pcidio_pci_table); static struct pci_driver ni_pcidio_pci_driver = …; module_comedi_pci_driver(…); MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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