/* SPDX-License-Identifier: GPL-2.0 */ #define CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE … #ifndef XKPHYS_TO_PHYS #define XKPHYS_TO_PHYS(p) … #endif #define OCTEON_IRQ_WORKQ0 … #define OCTEON_IRQ_RML … #define OCTEON_IRQ_TIMER1 … #define OCTEON_IS_MODEL(x) … #define octeon_has_feature(x) … #define octeon_get_clock_rate() … #define CVMX_SYNCIOBDMA … #define CVMX_HELPER_INPUT_TAG_TYPE … #define CVMX_HELPER_FIRST_MBUFF_SKIP … #define CVMX_FAU_REG_END … #define CVMX_FPA_OUTPUT_BUFFER_POOL … #define CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE … #define CVMX_FPA_PACKET_POOL … #define CVMX_FPA_PACKET_POOL_SIZE … #define CVMX_FPA_WQE_POOL … #define CVMX_FPA_WQE_POOL_SIZE … #define CVMX_GMXX_RXX_ADR_CAM_EN(a, b) … #define CVMX_GMXX_RXX_ADR_CTL(a, b) … #define CVMX_GMXX_PRTX_CFG(a, b) … #define CVMX_GMXX_RXX_FRM_MAX(a, b) … #define CVMX_GMXX_RXX_JABBER(a, b) … #define CVMX_IPD_CTL_STATUS … #define CVMX_PIP_FRM_LEN_CHKX(a) … #define CVMX_PIP_NUM_INPUT_PORTS … #define CVMX_SCR_SCRATCH … #define CVMX_PKO_QUEUES_PER_PORT_INTERFACE0 … #define CVMX_PKO_QUEUES_PER_PORT_INTERFACE1 … #define CVMX_IPD_SUB_PORT_FCS … #define CVMX_SSO_WQ_IQ_DIS … #define CVMX_SSO_WQ_INT … #define CVMX_POW_WQ_INT … #define CVMX_SSO_WQ_INT_PC … #define CVMX_NPI_RSL_INT_BLOCKS … #define CVMX_POW_WQ_INT_PC … cvmx_pip_wqe_word2; cvmx_pip_wqe_word0; cvmx_wqe_word0; cvmx_wqe_word1; cvmx_buf_ptr; struct cvmx_wqe { … }; cvmx_helper_link_info; enum cvmx_fau_reg_32 { … }; enum cvmx_fau_op_size { … }; cvmx_spi_mode_t; cvmx_helper_interface_mode_t; cvmx_pow_wait_t; cvmx_pko_lock_t; cvmx_pko_status_t; enum cvmx_pow_tag_type { … }; cvmx_ipd_ctl_status; cvmx_ipd_sub_port_fcs; cvmx_ipd_sub_port_qos_cnt; cvmx_pip_port_status_t; cvmx_pko_port_status_t; cvmx_pip_frm_len_chkx; cvmx_gmxx_rxx_frm_ctl; cvmx_gmxx_rxx_int_reg; cvmx_gmxx_prtx_cfg; cvmx_gmxx_rxx_adr_ctl; cvmx_pip_prt_tagx; cvmx_spxx_int_reg; cvmx_spxx_int_msk; cvmx_pow_wq_int; cvmx_sso_wq_int_thrx; cvmx_stxx_int_reg; cvmx_stxx_int_msk; cvmx_pow_wq_int_pc; cvmx_pow_wq_int_thrx; cvmx_npi_rsl_int_blocks; cvmx_pko_command_word0; cvmx_ciu_timx; cvmx_gmxx_rxx_rx_inbnd; static inline int32_t cvmx_fau_fetch_and_add32(enum cvmx_fau_reg_32 reg, int32_t value) { … } static inline void cvmx_fau_atomic_add32(enum cvmx_fau_reg_32 reg, int32_t value) { … } static inline void cvmx_fau_atomic_write32(enum cvmx_fau_reg_32 reg, int32_t value) { … } static inline uint64_t cvmx_scratch_read64(uint64_t address) { … } static inline void cvmx_scratch_write64(uint64_t address, uint64_t value) { … } static inline int cvmx_wqe_get_grp(struct cvmx_wqe *work) { … } static inline void *cvmx_phys_to_ptr(uint64_t physical_address) { … } static inline phys_addr_t cvmx_ptr_to_phys(void *ptr) { … } static inline int cvmx_helper_get_interface_num(int ipd_port) { … } static inline int cvmx_helper_get_interface_index_num(int ipd_port) { … } static inline void cvmx_fpa_enable(void) { … } static inline uint64_t cvmx_read_csr(uint64_t csr_addr) { … } static inline void cvmx_write_csr(uint64_t csr_addr, uint64_t val) { … } static inline int cvmx_helper_setup_red(int pass_thresh, int drop_thresh) { … } static inline void *cvmx_fpa_alloc(uint64_t pool) { … } static inline void cvmx_fpa_free(void *ptr, uint64_t pool, uint64_t num_cache_lines) { … } static inline int octeon_is_simulation(void) { … } static inline void cvmx_pip_get_port_status(uint64_t port_num, uint64_t clear, cvmx_pip_port_status_t *status) { … } static inline void cvmx_pko_get_port_status(uint64_t port_num, uint64_t clear, cvmx_pko_port_status_t *status) { … } static inline cvmx_helper_interface_mode_t cvmx_helper_interface_get_mode(int interface) { … } static inline union cvmx_helper_link_info cvmx_helper_link_get(int ipd_port) { … } static inline int cvmx_helper_link_set(int ipd_port, union cvmx_helper_link_info link_info) { … } static inline int cvmx_helper_initialize_packet_io_global(void) { … } static inline int cvmx_helper_get_number_of_interfaces(void) { … } static inline int cvmx_helper_ports_on_interface(int interface) { … } static inline int cvmx_helper_get_ipd_port(int interface, int port) { … } static inline int cvmx_helper_ipd_and_packet_input_enable(void) { … } static inline void cvmx_ipd_disable(void) { … } static inline void cvmx_ipd_free_ptr(void) { … } static inline void cvmx_pko_disable(void) { … } static inline void cvmx_pko_shutdown(void) { … } static inline int cvmx_pko_get_base_queue_per_core(int port, int core) { … } static inline int cvmx_pko_get_base_queue(int port) { … } static inline int cvmx_pko_get_num_queues(int port) { … } static inline unsigned int cvmx_get_core_num(void) { … } static inline void cvmx_pow_work_request_async_nocheck(int scr_addr, cvmx_pow_wait_t wait) { … } static inline void cvmx_pow_work_request_async(int scr_addr, cvmx_pow_wait_t wait) { … } static inline struct cvmx_wqe *cvmx_pow_work_response_async(int scr_addr) { … } static inline struct cvmx_wqe *cvmx_pow_work_request_sync(cvmx_pow_wait_t wait) { … } static inline int cvmx_spi_restart_interface(int interface, cvmx_spi_mode_t mode, int timeout) { … } static inline void cvmx_fau_async_fetch_and_add32(uint64_t scraddr, enum cvmx_fau_reg_32 reg, int32_t value) { … } static inline union cvmx_gmxx_rxx_rx_inbnd cvmx_spi4000_check_speed(int interface, int port) { … } static inline void cvmx_pko_send_packet_prepare(uint64_t port, uint64_t queue, cvmx_pko_lock_t use_locking) { … } static inline cvmx_pko_status_t cvmx_pko_send_packet_finish(uint64_t port, uint64_t queue, union cvmx_pko_command_word0 pko_command, union cvmx_buf_ptr packet, cvmx_pko_lock_t use_locking) { … } static inline void cvmx_wqe_set_port(struct cvmx_wqe *work, int port) { … } static inline void cvmx_wqe_set_qos(struct cvmx_wqe *work, int qos) { … } static inline int cvmx_wqe_get_qos(struct cvmx_wqe *work) { … } static inline void cvmx_wqe_set_grp(struct cvmx_wqe *work, int grp) { … } static inline void cvmx_pow_work_submit(struct cvmx_wqe *wqp, uint32_t tag, enum cvmx_pow_tag_type tag_type, uint64_t qos, uint64_t grp) { … } #define CVMX_ASXX_RX_CLK_SETX(a, b) … #define CVMX_ASXX_TX_CLK_SETX(a, b) … #define CVMX_CIU_TIMX(a) … #define CVMX_GMXX_RXX_ADR_CAM0(a, b) … #define CVMX_GMXX_RXX_ADR_CAM1(a, b) … #define CVMX_GMXX_RXX_ADR_CAM2(a, b) … #define CVMX_GMXX_RXX_ADR_CAM3(a, b) … #define CVMX_GMXX_RXX_ADR_CAM4(a, b) … #define CVMX_GMXX_RXX_ADR_CAM5(a, b) … #define CVMX_GMXX_RXX_FRM_CTL(a, b) … #define CVMX_GMXX_RXX_INT_REG(a, b) … #define CVMX_GMXX_SMACX(a, b) … #define CVMX_PIP_PRT_TAGX(a) … #define CVMX_POW_PP_GRP_MSKX(a) … #define CVMX_POW_WQ_INT_THRX(a) … #define CVMX_SPXX_INT_MSK(a) … #define CVMX_SPXX_INT_REG(a) … #define CVMX_SSO_PPX_GRP_MSK(a) … #define CVMX_SSO_WQ_INT_THRX(a) … #define CVMX_STXX_INT_MSK(a) … #define CVMX_STXX_INT_REG(a) …
Codebase Browser
linux