linux/drivers/staging/sm750fb/ddk750_reg.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef DDK750_REG_H__
#define DDK750_REG_H__

/* New register for SM750LE */
#define DE_STATE1
#define DE_STATE1_DE_ABORT

#define DE_STATE2
#define DE_STATE2_DE_FIFO_EMPTY
#define DE_STATE2_DE_STATUS_BUSY
#define DE_STATE2_DE_MEM_FIFO_EMPTY

#define SYSTEM_CTRL
#define SYSTEM_CTRL_DPMS_MASK
#define SYSTEM_CTRL_DPMS_VPHP
#define SYSTEM_CTRL_DPMS_VPHN
#define SYSTEM_CTRL_DPMS_VNHP
#define SYSTEM_CTRL_DPMS_VNHN
#define SYSTEM_CTRL_PCI_BURST
#define SYSTEM_CTRL_PCI_MASTER
#define SYSTEM_CTRL_LATENCY_TIMER_OFF
#define SYSTEM_CTRL_DE_FIFO_EMPTY
#define SYSTEM_CTRL_DE_STATUS_BUSY
#define SYSTEM_CTRL_DE_MEM_FIFO_EMPTY
#define SYSTEM_CTRL_CSC_STATUS_BUSY
#define SYSTEM_CTRL_CRT_VSYNC_ACTIVE
#define SYSTEM_CTRL_PANEL_VSYNC_ACTIVE
#define SYSTEM_CTRL_CURRENT_BUFFER_FLIP_PENDING
#define SYSTEM_CTRL_DMA_STATUS_BUSY
#define SYSTEM_CTRL_PCI_BURST_READ
#define SYSTEM_CTRL_DE_ABORT
#define SYSTEM_CTRL_PCI_SUBSYS_ID_LOCK
#define SYSTEM_CTRL_PCI_RETRY_OFF
#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_MASK
#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_1
#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_2
#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_4
#define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_8
#define SYSTEM_CTRL_CRT_TRISTATE
#define SYSTEM_CTRL_PCIMEM_TRISTATE
#define SYSTEM_CTRL_LOCALMEM_TRISTATE
#define SYSTEM_CTRL_PANEL_TRISTATE

#define MISC_CTRL
#define MISC_CTRL_DRAM_RERESH_COUNT
#define MISC_CTRL_DRAM_REFRESH_TIME_MASK
#define MISC_CTRL_DRAM_REFRESH_TIME_8
#define MISC_CTRL_DRAM_REFRESH_TIME_16
#define MISC_CTRL_DRAM_REFRESH_TIME_32
#define MISC_CTRL_DRAM_REFRESH_TIME_64
#define MISC_CTRL_INT_OUTPUT_INVERT
#define MISC_CTRL_PLL_CLK_COUNT
#define MISC_CTRL_DAC_POWER_OFF
#define MISC_CTRL_CLK_SELECT_TESTCLK
#define MISC_CTRL_DRAM_COLUMN_SIZE_MASK
#define MISC_CTRL_DRAM_COLUMN_SIZE_256
#define MISC_CTRL_DRAM_COLUMN_SIZE_512
#define MISC_CTRL_DRAM_COLUMN_SIZE_1024
#define MISC_CTRL_LOCALMEM_SIZE_MASK
#define MISC_CTRL_LOCALMEM_SIZE_8M
#define MISC_CTRL_LOCALMEM_SIZE_16M
#define MISC_CTRL_LOCALMEM_SIZE_32M
#define MISC_CTRL_LOCALMEM_SIZE_64M
#define MISC_CTRL_DRAM_TWTR
#define MISC_CTRL_DRAM_TWR
#define MISC_CTRL_DRAM_TRP
#define MISC_CTRL_DRAM_TRFC
#define MISC_CTRL_DRAM_TRAS
#define MISC_CTRL_LOCALMEM_RESET
#define MISC_CTRL_LOCALMEM_STATE_INACTIVE
#define MISC_CTRL_CPU_CAS_LATENCY
#define MISC_CTRL_DLL_OFF
#define MISC_CTRL_DRAM_OUTPUT_HIGH
#define MISC_CTRL_LOCALMEM_BUS_SIZE
#define MISC_CTRL_EMBEDDED_LOCALMEM_OFF

#define GPIO_MUX
#define GPIO_MUX_31
#define GPIO_MUX_30
#define GPIO_MUX_29
#define GPIO_MUX_28
#define GPIO_MUX_27
#define GPIO_MUX_26
#define GPIO_MUX_25
#define GPIO_MUX_24
#define GPIO_MUX_23
#define GPIO_MUX_22
#define GPIO_MUX_21
#define GPIO_MUX_20
#define GPIO_MUX_19
#define GPIO_MUX_18
#define GPIO_MUX_17
#define GPIO_MUX_16
#define GPIO_MUX_15
#define GPIO_MUX_14
#define GPIO_MUX_13
#define GPIO_MUX_12
#define GPIO_MUX_11
#define GPIO_MUX_10
#define GPIO_MUX_9
#define GPIO_MUX_8
#define GPIO_MUX_7
#define GPIO_MUX_6
#define GPIO_MUX_5
#define GPIO_MUX_4
#define GPIO_MUX_3
#define GPIO_MUX_2
#define GPIO_MUX_1
#define GPIO_MUX_0

#define LOCALMEM_ARBITRATION
#define LOCALMEM_ARBITRATION_ROTATE
#define LOCALMEM_ARBITRATION_VGA_MASK
#define LOCALMEM_ARBITRATION_VGA_OFF
#define LOCALMEM_ARBITRATION_VGA_PRIORITY_1
#define LOCALMEM_ARBITRATION_VGA_PRIORITY_2
#define LOCALMEM_ARBITRATION_VGA_PRIORITY_3
#define LOCALMEM_ARBITRATION_VGA_PRIORITY_4
#define LOCALMEM_ARBITRATION_VGA_PRIORITY_5
#define LOCALMEM_ARBITRATION_VGA_PRIORITY_6
#define LOCALMEM_ARBITRATION_VGA_PRIORITY_7
#define LOCALMEM_ARBITRATION_DMA_MASK
#define LOCALMEM_ARBITRATION_DMA_OFF
#define LOCALMEM_ARBITRATION_DMA_PRIORITY_1
#define LOCALMEM_ARBITRATION_DMA_PRIORITY_2
#define LOCALMEM_ARBITRATION_DMA_PRIORITY_3
#define LOCALMEM_ARBITRATION_DMA_PRIORITY_4
#define LOCALMEM_ARBITRATION_DMA_PRIORITY_5
#define LOCALMEM_ARBITRATION_DMA_PRIORITY_6
#define LOCALMEM_ARBITRATION_DMA_PRIORITY_7
#define LOCALMEM_ARBITRATION_ZVPORT1_MASK
#define LOCALMEM_ARBITRATION_ZVPORT1_OFF
#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_1
#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_2
#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_3
#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_4
#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_5
#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_6
#define LOCALMEM_ARBITRATION_ZVPORT1_PRIORITY_7
#define LOCALMEM_ARBITRATION_ZVPORT0_MASK
#define LOCALMEM_ARBITRATION_ZVPORT0_OFF
#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_1
#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_2
#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_3
#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_4
#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_5
#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_6
#define LOCALMEM_ARBITRATION_ZVPORT0_PRIORITY_7
#define LOCALMEM_ARBITRATION_VIDEO_MASK
#define LOCALMEM_ARBITRATION_VIDEO_OFF
#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_1
#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_2
#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_3
#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_4
#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_5
#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_6
#define LOCALMEM_ARBITRATION_VIDEO_PRIORITY_7
#define LOCALMEM_ARBITRATION_PANEL_MASK
#define LOCALMEM_ARBITRATION_PANEL_OFF
#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_1
#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_2
#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_3
#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_4
#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_5
#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_6
#define LOCALMEM_ARBITRATION_PANEL_PRIORITY_7
#define LOCALMEM_ARBITRATION_CRT_MASK
#define LOCALMEM_ARBITRATION_CRT_OFF
#define LOCALMEM_ARBITRATION_CRT_PRIORITY_1
#define LOCALMEM_ARBITRATION_CRT_PRIORITY_2
#define LOCALMEM_ARBITRATION_CRT_PRIORITY_3
#define LOCALMEM_ARBITRATION_CRT_PRIORITY_4
#define LOCALMEM_ARBITRATION_CRT_PRIORITY_5
#define LOCALMEM_ARBITRATION_CRT_PRIORITY_6
#define LOCALMEM_ARBITRATION_CRT_PRIORITY_7

#define PCIMEM_ARBITRATION
#define PCIMEM_ARBITRATION_ROTATE
#define PCIMEM_ARBITRATION_VGA_MASK
#define PCIMEM_ARBITRATION_VGA_OFF
#define PCIMEM_ARBITRATION_VGA_PRIORITY_1
#define PCIMEM_ARBITRATION_VGA_PRIORITY_2
#define PCIMEM_ARBITRATION_VGA_PRIORITY_3
#define PCIMEM_ARBITRATION_VGA_PRIORITY_4
#define PCIMEM_ARBITRATION_VGA_PRIORITY_5
#define PCIMEM_ARBITRATION_VGA_PRIORITY_6
#define PCIMEM_ARBITRATION_VGA_PRIORITY_7
#define PCIMEM_ARBITRATION_DMA_MASK
#define PCIMEM_ARBITRATION_DMA_OFF
#define PCIMEM_ARBITRATION_DMA_PRIORITY_1
#define PCIMEM_ARBITRATION_DMA_PRIORITY_2
#define PCIMEM_ARBITRATION_DMA_PRIORITY_3
#define PCIMEM_ARBITRATION_DMA_PRIORITY_4
#define PCIMEM_ARBITRATION_DMA_PRIORITY_5
#define PCIMEM_ARBITRATION_DMA_PRIORITY_6
#define PCIMEM_ARBITRATION_DMA_PRIORITY_7
#define PCIMEM_ARBITRATION_ZVPORT1_MASK
#define PCIMEM_ARBITRATION_ZVPORT1_OFF
#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_1
#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_2
#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_3
#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_4
#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_5
#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_6
#define PCIMEM_ARBITRATION_ZVPORT1_PRIORITY_7
#define PCIMEM_ARBITRATION_ZVPORT0_MASK
#define PCIMEM_ARBITRATION_ZVPORT0_OFF
#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_1
#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_2
#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_3
#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_4
#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_5
#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_6
#define PCIMEM_ARBITRATION_ZVPORT0_PRIORITY_7
#define PCIMEM_ARBITRATION_VIDEO_MASK
#define PCIMEM_ARBITRATION_VIDEO_OFF
#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_1
#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_2
#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_3
#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_4
#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_5
#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_6
#define PCIMEM_ARBITRATION_VIDEO_PRIORITY_7
#define PCIMEM_ARBITRATION_PANEL_MASK
#define PCIMEM_ARBITRATION_PANEL_OFF
#define PCIMEM_ARBITRATION_PANEL_PRIORITY_1
#define PCIMEM_ARBITRATION_PANEL_PRIORITY_2
#define PCIMEM_ARBITRATION_PANEL_PRIORITY_3
#define PCIMEM_ARBITRATION_PANEL_PRIORITY_4
#define PCIMEM_ARBITRATION_PANEL_PRIORITY_5
#define PCIMEM_ARBITRATION_PANEL_PRIORITY_6
#define PCIMEM_ARBITRATION_PANEL_PRIORITY_7
#define PCIMEM_ARBITRATION_CRT_MASK
#define PCIMEM_ARBITRATION_CRT_OFF
#define PCIMEM_ARBITRATION_CRT_PRIORITY_1
#define PCIMEM_ARBITRATION_CRT_PRIORITY_2
#define PCIMEM_ARBITRATION_CRT_PRIORITY_3
#define PCIMEM_ARBITRATION_CRT_PRIORITY_4
#define PCIMEM_ARBITRATION_CRT_PRIORITY_5
#define PCIMEM_ARBITRATION_CRT_PRIORITY_6
#define PCIMEM_ARBITRATION_CRT_PRIORITY_7

#define RAW_INT
#define RAW_INT_ZVPORT1_VSYNC
#define RAW_INT_ZVPORT0_VSYNC
#define RAW_INT_CRT_VSYNC
#define RAW_INT_PANEL_VSYNC
#define RAW_INT_VGA_VSYNC

#define INT_STATUS
#define INT_STATUS_GPIO31
#define INT_STATUS_GPIO30
#define INT_STATUS_GPIO29
#define INT_STATUS_GPIO28
#define INT_STATUS_GPIO27
#define INT_STATUS_GPIO26
#define INT_STATUS_GPIO25
#define INT_STATUS_I2C
#define INT_STATUS_PWM
#define INT_STATUS_DMA1
#define INT_STATUS_DMA0
#define INT_STATUS_PCI
#define INT_STATUS_SSP1
#define INT_STATUS_SSP0
#define INT_STATUS_DE
#define INT_STATUS_ZVPORT1_VSYNC
#define INT_STATUS_ZVPORT0_VSYNC
#define INT_STATUS_CRT_VSYNC
#define INT_STATUS_PANEL_VSYNC
#define INT_STATUS_VGA_VSYNC

#define INT_MASK
#define INT_MASK_GPIO31
#define INT_MASK_GPIO30
#define INT_MASK_GPIO29
#define INT_MASK_GPIO28
#define INT_MASK_GPIO27
#define INT_MASK_GPIO26
#define INT_MASK_GPIO25
#define INT_MASK_I2C
#define INT_MASK_PWM
#define INT_MASK_DMA1
#define INT_MASK_DMA
#define INT_MASK_PCI
#define INT_MASK_SSP1
#define INT_MASK_SSP0
#define INT_MASK_DE
#define INT_MASK_ZVPORT1_VSYNC
#define INT_MASK_ZVPORT0_VSYNC
#define INT_MASK_CRT_VSYNC
#define INT_MASK_PANEL_VSYNC
#define INT_MASK_VGA_VSYNC

#define CURRENT_GATE
#define CURRENT_GATE_MCLK_MASK
#ifdef VALIDATION_CHIP
    #define CURRENT_GATE_MCLK_112MHZ
    #define CURRENT_GATE_MCLK_84MHZ
    #define CURRENT_GATE_MCLK_56MHZ
    #define CURRENT_GATE_MCLK_42MHZ
#else
    #define CURRENT_GATE_MCLK_DIV_3
    #define CURRENT_GATE_MCLK_DIV_4
    #define CURRENT_GATE_MCLK_DIV_6
    #define CURRENT_GATE_MCLK_DIV_8
#endif
#define CURRENT_GATE_M2XCLK_MASK
#ifdef VALIDATION_CHIP
    #define CURRENT_GATE_M2XCLK_336MHZ
    #define CURRENT_GATE_M2XCLK_168MHZ
    #define CURRENT_GATE_M2XCLK_112MHZ
    #define CURRENT_GATE_M2XCLK_84MHZ
#else
    #define CURRENT_GATE_M2XCLK_DIV_1
    #define CURRENT_GATE_M2XCLK_DIV_2
    #define CURRENT_GATE_M2XCLK_DIV_3
    #define CURRENT_GATE_M2XCLK_DIV_4
#endif
#define CURRENT_GATE_VGA
#define CURRENT_GATE_PWM
#define CURRENT_GATE_I2C
#define CURRENT_GATE_SSP
#define CURRENT_GATE_GPIO
#define CURRENT_GATE_ZVPORT
#define CURRENT_GATE_CSC
#define CURRENT_GATE_DE
#define CURRENT_GATE_DISPLAY
#define CURRENT_GATE_LOCALMEM
#define CURRENT_GATE_DMA

#define MODE0_GATE
#define MODE0_GATE_MCLK_MASK
#define MODE0_GATE_MCLK_112MHZ
#define MODE0_GATE_MCLK_84MHZ
#define MODE0_GATE_MCLK_56MHZ
#define MODE0_GATE_MCLK_42MHZ
#define MODE0_GATE_M2XCLK_MASK
#define MODE0_GATE_M2XCLK_336MHZ
#define MODE0_GATE_M2XCLK_168MHZ
#define MODE0_GATE_M2XCLK_112MHZ
#define MODE0_GATE_M2XCLK_84MHZ
#define MODE0_GATE_VGA
#define MODE0_GATE_PWM
#define MODE0_GATE_I2C
#define MODE0_GATE_SSP
#define MODE0_GATE_GPIO
#define MODE0_GATE_ZVPORT
#define MODE0_GATE_CSC
#define MODE0_GATE_DE
#define MODE0_GATE_DISPLAY
#define MODE0_GATE_LOCALMEM
#define MODE0_GATE_DMA

#define MODE1_GATE
#define MODE1_GATE_MCLK_MASK
#define MODE1_GATE_MCLK_112MHZ
#define MODE1_GATE_MCLK_84MHZ
#define MODE1_GATE_MCLK_56MHZ
#define MODE1_GATE_MCLK_42MHZ
#define MODE1_GATE_M2XCLK_MASK
#define MODE1_GATE_M2XCLK_336MHZ
#define MODE1_GATE_M2XCLK_168MHZ
#define MODE1_GATE_M2XCLK_112MHZ
#define MODE1_GATE_M2XCLK_84MHZ
#define MODE1_GATE_VGA
#define MODE1_GATE_PWM
#define MODE1_GATE_I2C
#define MODE1_GATE_SSP
#define MODE1_GATE_GPIO
#define MODE1_GATE_ZVPORT
#define MODE1_GATE_CSC
#define MODE1_GATE_DE
#define MODE1_GATE_DISPLAY
#define MODE1_GATE_LOCALMEM
#define MODE1_GATE_DMA

#define POWER_MODE_CTRL
#ifdef VALIDATION_CHIP
    #define POWER_MODE_CTRL_336CLK
#endif
#define POWER_MODE_CTRL_OSC_INPUT
#define POWER_MODE_CTRL_ACPI
#define POWER_MODE_CTRL_MODE_MASK
#define POWER_MODE_CTRL_MODE_MODE0
#define POWER_MODE_CTRL_MODE_MODE1
#define POWER_MODE_CTRL_MODE_SLEEP

#define PCI_MASTER_BASE
#define PCI_MASTER_BASE_ADDRESS_MASK

#define DEVICE_ID
#define DEVICE_ID_DEVICE_ID_MASK
#define DEVICE_ID_REVISION_ID_MASK

#define PLL_CLK_COUNT
#define PLL_CLK_COUNT_COUNTER_MASK

#define PANEL_PLL_CTRL
#define PLL_CTRL_BYPASS
#define PLL_CTRL_POWER
#define PLL_CTRL_INPUT
#ifdef VALIDATION_CHIP
    #define PLL_CTRL_OD_SHIFT
    #define PLL_CTRL_OD_MASK
#else
    #define PLL_CTRL_POD_SHIFT
    #define PLL_CTRL_POD_MASK
    #define PLL_CTRL_OD_SHIFT
    #define PLL_CTRL_OD_MASK
#endif
#define PLL_CTRL_N_SHIFT
#define PLL_CTRL_N_MASK
#define PLL_CTRL_M_SHIFT
#define PLL_CTRL_M_MASK

#define CRT_PLL_CTRL

#define VGA_PLL0_CTRL

#define VGA_PLL1_CTRL

#define SCRATCH_DATA

#ifndef VALIDATION_CHIP

#define MXCLK_PLL_CTRL

#define VGA_CONFIGURATION
#define VGA_CONFIGURATION_USER_DEFINE_MASK
#define VGA_CONFIGURATION_PLL
#define VGA_CONFIGURATION_MODE

#endif

#define GPIO_DATA
#define GPIO_DATA_31
#define GPIO_DATA_30
#define GPIO_DATA_29
#define GPIO_DATA_28
#define GPIO_DATA_27
#define GPIO_DATA_26
#define GPIO_DATA_25
#define GPIO_DATA_24
#define GPIO_DATA_23
#define GPIO_DATA_22
#define GPIO_DATA_21
#define GPIO_DATA_20
#define GPIO_DATA_19
#define GPIO_DATA_18
#define GPIO_DATA_17
#define GPIO_DATA_16
#define GPIO_DATA_15
#define GPIO_DATA_14
#define GPIO_DATA_13
#define GPIO_DATA_12
#define GPIO_DATA_11
#define GPIO_DATA_10
#define GPIO_DATA_9
#define GPIO_DATA_8
#define GPIO_DATA_7
#define GPIO_DATA_6
#define GPIO_DATA_5
#define GPIO_DATA_4
#define GPIO_DATA_3
#define GPIO_DATA_2
#define GPIO_DATA_1
#define GPIO_DATA_0

#define GPIO_DATA_DIRECTION
#define GPIO_DATA_DIRECTION_31
#define GPIO_DATA_DIRECTION_30
#define GPIO_DATA_DIRECTION_29
#define GPIO_DATA_DIRECTION_28
#define GPIO_DATA_DIRECTION_27
#define GPIO_DATA_DIRECTION_26
#define GPIO_DATA_DIRECTION_25
#define GPIO_DATA_DIRECTION_24
#define GPIO_DATA_DIRECTION_23
#define GPIO_DATA_DIRECTION_22
#define GPIO_DATA_DIRECTION_21
#define GPIO_DATA_DIRECTION_20
#define GPIO_DATA_DIRECTION_19
#define GPIO_DATA_DIRECTION_18
#define GPIO_DATA_DIRECTION_17
#define GPIO_DATA_DIRECTION_16
#define GPIO_DATA_DIRECTION_15
#define GPIO_DATA_DIRECTION_14
#define GPIO_DATA_DIRECTION_13
#define GPIO_DATA_DIRECTION_12
#define GPIO_DATA_DIRECTION_11
#define GPIO_DATA_DIRECTION_10
#define GPIO_DATA_DIRECTION_9
#define GPIO_DATA_DIRECTION_8
#define GPIO_DATA_DIRECTION_7
#define GPIO_DATA_DIRECTION_6
#define GPIO_DATA_DIRECTION_5
#define GPIO_DATA_DIRECTION_4
#define GPIO_DATA_DIRECTION_3
#define GPIO_DATA_DIRECTION_2
#define GPIO_DATA_DIRECTION_1
#define GPIO_DATA_DIRECTION_0

#define GPIO_INTERRUPT_SETUP
#define GPIO_INTERRUPT_SETUP_TRIGGER_31
#define GPIO_INTERRUPT_SETUP_TRIGGER_30
#define GPIO_INTERRUPT_SETUP_TRIGGER_29
#define GPIO_INTERRUPT_SETUP_TRIGGER_28
#define GPIO_INTERRUPT_SETUP_TRIGGER_27
#define GPIO_INTERRUPT_SETUP_TRIGGER_26
#define GPIO_INTERRUPT_SETUP_TRIGGER_25
#define GPIO_INTERRUPT_SETUP_ACTIVE_31
#define GPIO_INTERRUPT_SETUP_ACTIVE_30
#define GPIO_INTERRUPT_SETUP_ACTIVE_29
#define GPIO_INTERRUPT_SETUP_ACTIVE_28
#define GPIO_INTERRUPT_SETUP_ACTIVE_27
#define GPIO_INTERRUPT_SETUP_ACTIVE_26
#define GPIO_INTERRUPT_SETUP_ACTIVE_25
#define GPIO_INTERRUPT_SETUP_ENABLE_31
#define GPIO_INTERRUPT_SETUP_ENABLE_30
#define GPIO_INTERRUPT_SETUP_ENABLE_29
#define GPIO_INTERRUPT_SETUP_ENABLE_28
#define GPIO_INTERRUPT_SETUP_ENABLE_27
#define GPIO_INTERRUPT_SETUP_ENABLE_26
#define GPIO_INTERRUPT_SETUP_ENABLE_25

#define GPIO_INTERRUPT_STATUS
#define GPIO_INTERRUPT_STATUS_31
#define GPIO_INTERRUPT_STATUS_30
#define GPIO_INTERRUPT_STATUS_29
#define GPIO_INTERRUPT_STATUS_28
#define GPIO_INTERRUPT_STATUS_27
#define GPIO_INTERRUPT_STATUS_26
#define GPIO_INTERRUPT_STATUS_25

#define PANEL_DISPLAY_CTRL
#define PANEL_DISPLAY_CTRL_RESERVED_MASK
#define PANEL_DISPLAY_CTRL_SELECT_SHIFT
#define PANEL_DISPLAY_CTRL_SELECT_MASK
#define PANEL_DISPLAY_CTRL_SELECT_PANEL
#define PANEL_DISPLAY_CTRL_SELECT_VGA
#define PANEL_DISPLAY_CTRL_SELECT_CRT
#define PANEL_DISPLAY_CTRL_FPEN
#define PANEL_DISPLAY_CTRL_VBIASEN
#define PANEL_DISPLAY_CTRL_DATA
#define PANEL_DISPLAY_CTRL_FPVDDEN
#define PANEL_DISPLAY_CTRL_DUAL_DISPLAY
#define PANEL_DISPLAY_CTRL_DOUBLE_PIXEL
#define PANEL_DISPLAY_CTRL_FIFO
#define PANEL_DISPLAY_CTRL_FIFO_1
#define PANEL_DISPLAY_CTRL_FIFO_3
#define PANEL_DISPLAY_CTRL_FIFO_7
#define PANEL_DISPLAY_CTRL_FIFO_11
#define DISPLAY_CTRL_CLOCK_PHASE
#define DISPLAY_CTRL_VSYNC_PHASE
#define DISPLAY_CTRL_HSYNC_PHASE
#define PANEL_DISPLAY_CTRL_VSYNC
#define PANEL_DISPLAY_CTRL_CAPTURE_TIMING
#define PANEL_DISPLAY_CTRL_COLOR_KEY
#define DISPLAY_CTRL_TIMING
#define PANEL_DISPLAY_CTRL_VERTICAL_PAN_DIR
#define PANEL_DISPLAY_CTRL_VERTICAL_PAN
#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN_DIR
#define PANEL_DISPLAY_CTRL_HORIZONTAL_PAN
#define DISPLAY_CTRL_GAMMA
#define DISPLAY_CTRL_PLANE
#define PANEL_DISPLAY_CTRL_FORMAT
#define PANEL_DISPLAY_CTRL_FORMAT_8
#define PANEL_DISPLAY_CTRL_FORMAT_16
#define PANEL_DISPLAY_CTRL_FORMAT_32

#define PANEL_PAN_CTRL
#define PANEL_PAN_CTRL_VERTICAL_PAN_MASK
#define PANEL_PAN_CTRL_VERTICAL_VSYNC_MASK
#define PANEL_PAN_CTRL_HORIZONTAL_PAN_MASK
#define PANEL_PAN_CTRL_HORIZONTAL_VSYNC_MASK

#define PANEL_COLOR_KEY
#define PANEL_COLOR_KEY_MASK_MASK
#define PANEL_COLOR_KEY_VALUE_MASK

#define PANEL_FB_ADDRESS
#define PANEL_FB_ADDRESS_STATUS
#define PANEL_FB_ADDRESS_EXT
#define PANEL_FB_ADDRESS_ADDRESS_MASK

#define PANEL_FB_WIDTH
#define PANEL_FB_WIDTH_WIDTH_SHIFT
#define PANEL_FB_WIDTH_WIDTH_MASK
#define PANEL_FB_WIDTH_OFFSET_MASK

#define PANEL_WINDOW_WIDTH
#define PANEL_WINDOW_WIDTH_WIDTH_SHIFT
#define PANEL_WINDOW_WIDTH_WIDTH_MASK
#define PANEL_WINDOW_WIDTH_X_MASK

#define PANEL_WINDOW_HEIGHT
#define PANEL_WINDOW_HEIGHT_HEIGHT_SHIFT
#define PANEL_WINDOW_HEIGHT_HEIGHT_MASK
#define PANEL_WINDOW_HEIGHT_Y_MASK

#define PANEL_PLANE_TL
#define PANEL_PLANE_TL_TOP_SHIFT
#define PANEL_PLANE_TL_TOP_MASK
#define PANEL_PLANE_TL_LEFT_MASK

#define PANEL_PLANE_BR
#define PANEL_PLANE_BR_BOTTOM_SHIFT
#define PANEL_PLANE_BR_BOTTOM_MASK
#define PANEL_PLANE_BR_RIGHT_MASK

#define PANEL_HORIZONTAL_TOTAL
#define PANEL_HORIZONTAL_TOTAL_TOTAL_SHIFT
#define PANEL_HORIZONTAL_TOTAL_TOTAL_MASK
#define PANEL_HORIZONTAL_TOTAL_DISPLAY_END_MASK

#define PANEL_HORIZONTAL_SYNC
#define PANEL_HORIZONTAL_SYNC_WIDTH_SHIFT
#define PANEL_HORIZONTAL_SYNC_WIDTH_MASK
#define PANEL_HORIZONTAL_SYNC_START_MASK

#define PANEL_VERTICAL_TOTAL
#define PANEL_VERTICAL_TOTAL_TOTAL_SHIFT
#define PANEL_VERTICAL_TOTAL_TOTAL_MASK
#define PANEL_VERTICAL_TOTAL_DISPLAY_END_MASK

#define PANEL_VERTICAL_SYNC
#define PANEL_VERTICAL_SYNC_HEIGHT_SHIFT
#define PANEL_VERTICAL_SYNC_HEIGHT_MASK
#define PANEL_VERTICAL_SYNC_START_MASK

#define PANEL_CURRENT_LINE
#define PANEL_CURRENT_LINE_LINE_MASK

/* Video Control */

#define VIDEO_DISPLAY_CTRL
#define VIDEO_DISPLAY_CTRL_LINE_BUFFER
#define VIDEO_DISPLAY_CTRL_FIFO_MASK
#define VIDEO_DISPLAY_CTRL_FIFO_1
#define VIDEO_DISPLAY_CTRL_FIFO_3
#define VIDEO_DISPLAY_CTRL_FIFO_7
#define VIDEO_DISPLAY_CTRL_FIFO_11
#define VIDEO_DISPLAY_CTRL_BUFFER
#define VIDEO_DISPLAY_CTRL_CAPTURE
#define VIDEO_DISPLAY_CTRL_DOUBLE_BUFFER
#define VIDEO_DISPLAY_CTRL_BYTE_SWAP
#define VIDEO_DISPLAY_CTRL_VERTICAL_SCALE
#define VIDEO_DISPLAY_CTRL_HORIZONTAL_SCALE
#define VIDEO_DISPLAY_CTRL_VERTICAL_MODE
#define VIDEO_DISPLAY_CTRL_HORIZONTAL_MODE
#define VIDEO_DISPLAY_CTRL_PIXEL_MASK
#define VIDEO_DISPLAY_CTRL_GAMMA
#define VIDEO_DISPLAY_CTRL_FORMAT_MASK
#define VIDEO_DISPLAY_CTRL_FORMAT_8
#define VIDEO_DISPLAY_CTRL_FORMAT_16
#define VIDEO_DISPLAY_CTRL_FORMAT_32
#define VIDEO_DISPLAY_CTRL_FORMAT_YUV

#define VIDEO_FB_0_ADDRESS
#define VIDEO_FB_0_ADDRESS_STATUS
#define VIDEO_FB_0_ADDRESS_EXT
#define VIDEO_FB_0_ADDRESS_ADDRESS_MASK

#define VIDEO_FB_WIDTH
#define VIDEO_FB_WIDTH_WIDTH_MASK
#define VIDEO_FB_WIDTH_OFFSET_MASK

#define VIDEO_FB_0_LAST_ADDRESS
#define VIDEO_FB_0_LAST_ADDRESS_EXT
#define VIDEO_FB_0_LAST_ADDRESS_ADDRESS_MASK

#define VIDEO_PLANE_TL
#define VIDEO_PLANE_TL_TOP_MASK
#define VIDEO_PLANE_TL_LEFT_MASK

#define VIDEO_PLANE_BR
#define VIDEO_PLANE_BR_BOTTOM_MASK
#define VIDEO_PLANE_BR_RIGHT_MASK

#define VIDEO_SCALE
#define VIDEO_SCALE_VERTICAL_MODE
#define VIDEO_SCALE_VERTICAL_SCALE_MASK
#define VIDEO_SCALE_HORIZONTAL_MODE
#define VIDEO_SCALE_HORIZONTAL_SCALE_MASK

#define VIDEO_INITIAL_SCALE
#define VIDEO_INITIAL_SCALE_FB_1_MASK
#define VIDEO_INITIAL_SCALE_FB_0_MASK

#define VIDEO_YUV_CONSTANTS
#define VIDEO_YUV_CONSTANTS_Y_MASK
#define VIDEO_YUV_CONSTANTS_R_MASK
#define VIDEO_YUV_CONSTANTS_G_MASK
#define VIDEO_YUV_CONSTANTS_B_MASK

#define VIDEO_FB_1_ADDRESS
#define VIDEO_FB_1_ADDRESS_STATUS
#define VIDEO_FB_1_ADDRESS_EXT
#define VIDEO_FB_1_ADDRESS_ADDRESS_MASK

#define VIDEO_FB_1_LAST_ADDRESS
#define VIDEO_FB_1_LAST_ADDRESS_EXT
#define VIDEO_FB_1_LAST_ADDRESS_ADDRESS_MASK

/* Video Alpha Control */

#define VIDEO_ALPHA_DISPLAY_CTRL
#define VIDEO_ALPHA_DISPLAY_CTRL_SELECT
#define VIDEO_ALPHA_DISPLAY_CTRL_ALPHA_MASK
#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_MASK
#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_1
#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_3
#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_7
#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_11
#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_SCALE
#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_SCALE
#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_MODE
#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_MODE
#define VIDEO_ALPHA_DISPLAY_CTRL_PIXEL_MASK
#define VIDEO_ALPHA_DISPLAY_CTRL_CHROMA_KEY
#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_MASK
#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_8
#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_16
#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4
#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4_4_4

#define VIDEO_ALPHA_FB_ADDRESS
#define VIDEO_ALPHA_FB_ADDRESS_STATUS
#define VIDEO_ALPHA_FB_ADDRESS_EXT
#define VIDEO_ALPHA_FB_ADDRESS_ADDRESS_MASK

#define VIDEO_ALPHA_FB_WIDTH
#define VIDEO_ALPHA_FB_WIDTH_WIDTH_MASK
#define VIDEO_ALPHA_FB_WIDTH_OFFSET_MASK

#define VIDEO_ALPHA_FB_LAST_ADDRESS
#define VIDEO_ALPHA_FB_LAST_ADDRESS_EXT
#define VIDEO_ALPHA_FB_LAST_ADDRESS_ADDRESS_MASK

#define VIDEO_ALPHA_PLANE_TL
#define VIDEO_ALPHA_PLANE_TL_TOP_MASK
#define VIDEO_ALPHA_PLANE_TL_LEFT_MASK

#define VIDEO_ALPHA_PLANE_BR
#define VIDEO_ALPHA_PLANE_BR_BOTTOM_MASK
#define VIDEO_ALPHA_PLANE_BR_RIGHT_MASK

#define VIDEO_ALPHA_SCALE
#define VIDEO_ALPHA_SCALE_VERTICAL_MODE
#define VIDEO_ALPHA_SCALE_VERTICAL_SCALE_MASK
#define VIDEO_ALPHA_SCALE_HORIZONTAL_MODE
#define VIDEO_ALPHA_SCALE_HORIZONTAL_SCALE_MASK

#define VIDEO_ALPHA_INITIAL_SCALE
#define VIDEO_ALPHA_INITIAL_SCALE_VERTICAL_MASK
#define VIDEO_ALPHA_INITIAL_SCALE_HORIZONTAL_MASK

#define VIDEO_ALPHA_CHROMA_KEY
#define VIDEO_ALPHA_CHROMA_KEY_MASK_MASK
#define VIDEO_ALPHA_CHROMA_KEY_VALUE_MASK

#define VIDEO_ALPHA_COLOR_LOOKUP_01
#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_RED_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_GREEN_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_BLUE_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_RED_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_GREEN_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_BLUE_MASK

#define VIDEO_ALPHA_COLOR_LOOKUP_23
#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_RED_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_GREEN_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_BLUE_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_RED_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_GREEN_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_BLUE_MASK

#define VIDEO_ALPHA_COLOR_LOOKUP_45
#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_RED_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_GREEN_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_BLUE_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_RED_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_GREEN_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_BLUE_MASK

#define VIDEO_ALPHA_COLOR_LOOKUP_67
#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_RED_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_GREEN_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_BLUE_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_RED_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_GREEN_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_BLUE_MASK

#define VIDEO_ALPHA_COLOR_LOOKUP_89
#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_RED_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_GREEN_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_BLUE_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_RED_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_GREEN_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_BLUE_MASK

#define VIDEO_ALPHA_COLOR_LOOKUP_AB
#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_RED_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_GREEN_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_BLUE_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_RED_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_GREEN_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_BLUE_MASK

#define VIDEO_ALPHA_COLOR_LOOKUP_CD
#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_RED_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_GREEN_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_BLUE_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_RED_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_GREEN_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_BLUE_MASK

#define VIDEO_ALPHA_COLOR_LOOKUP_EF
#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_RED_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_GREEN_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_BLUE_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_RED_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_GREEN_MASK
#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_BLUE_MASK

/* Panel Cursor Control */

#define PANEL_HWC_ADDRESS
#define PANEL_HWC_ADDRESS_ENABLE
#define PANEL_HWC_ADDRESS_EXT
#define PANEL_HWC_ADDRESS_ADDRESS_MASK

#define PANEL_HWC_LOCATION
#define PANEL_HWC_LOCATION_TOP
#define PANEL_HWC_LOCATION_Y_MASK
#define PANEL_HWC_LOCATION_LEFT
#define PANEL_HWC_LOCATION_X_MASK

#define PANEL_HWC_COLOR_12
#define PANEL_HWC_COLOR_12_2_RGB565_MASK
#define PANEL_HWC_COLOR_12_1_RGB565_MASK

#define PANEL_HWC_COLOR_3
#define PANEL_HWC_COLOR_3_RGB565_MASK

/* Old Definitions +++ */
#define PANEL_HWC_COLOR_01
#define PANEL_HWC_COLOR_01_1_RED_MASK
#define PANEL_HWC_COLOR_01_1_GREEN_MASK
#define PANEL_HWC_COLOR_01_1_BLUE_MASK
#define PANEL_HWC_COLOR_01_0_RED_MASK
#define PANEL_HWC_COLOR_01_0_GREEN_MASK
#define PANEL_HWC_COLOR_01_0_BLUE_MASK

#define PANEL_HWC_COLOR_2
#define PANEL_HWC_COLOR_2_RED_MASK
#define PANEL_HWC_COLOR_2_GREEN_MASK
#define PANEL_HWC_COLOR_2_BLUE_MASK
/* Old Definitions --- */

/* Alpha Control */

#define ALPHA_DISPLAY_CTRL
#define ALPHA_DISPLAY_CTRL_SELECT
#define ALPHA_DISPLAY_CTRL_ALPHA_MASK
#define ALPHA_DISPLAY_CTRL_FIFO_MASK
#define ALPHA_DISPLAY_CTRL_FIFO_1
#define ALPHA_DISPLAY_CTRL_FIFO_3
#define ALPHA_DISPLAY_CTRL_FIFO_7
#define ALPHA_DISPLAY_CTRL_FIFO_11
#define ALPHA_DISPLAY_CTRL_PIXEL_MASK
#define ALPHA_DISPLAY_CTRL_CHROMA_KEY
#define ALPHA_DISPLAY_CTRL_FORMAT_MASK
#define ALPHA_DISPLAY_CTRL_FORMAT_16
#define ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4
#define ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4_4_4

#define ALPHA_FB_ADDRESS
#define ALPHA_FB_ADDRESS_STATUS
#define ALPHA_FB_ADDRESS_EXT
#define ALPHA_FB_ADDRESS_ADDRESS_MASK

#define ALPHA_FB_WIDTH
#define ALPHA_FB_WIDTH_WIDTH_MASK
#define ALPHA_FB_WIDTH_OFFSET_MASK

#define ALPHA_PLANE_TL
#define ALPHA_PLANE_TL_TOP_MASK
#define ALPHA_PLANE_TL_LEFT_MASK

#define ALPHA_PLANE_BR
#define ALPHA_PLANE_BR_BOTTOM_MASK
#define ALPHA_PLANE_BR_RIGHT_MASK

#define ALPHA_CHROMA_KEY
#define ALPHA_CHROMA_KEY_MASK_MASK
#define ALPHA_CHROMA_KEY_VALUE_MASK

#define ALPHA_COLOR_LOOKUP_01
#define ALPHA_COLOR_LOOKUP_01_1_MASK
#define ALPHA_COLOR_LOOKUP_01_1_RED_MASK
#define ALPHA_COLOR_LOOKUP_01_1_GREEN_MASK
#define ALPHA_COLOR_LOOKUP_01_1_BLUE_MASK
#define ALPHA_COLOR_LOOKUP_01_0_MASK
#define ALPHA_COLOR_LOOKUP_01_0_RED_MASK
#define ALPHA_COLOR_LOOKUP_01_0_GREEN_MASK
#define ALPHA_COLOR_LOOKUP_01_0_BLUE_MASK

#define ALPHA_COLOR_LOOKUP_23
#define ALPHA_COLOR_LOOKUP_23_3_MASK
#define ALPHA_COLOR_LOOKUP_23_3_RED_MASK
#define ALPHA_COLOR_LOOKUP_23_3_GREEN_MASK
#define ALPHA_COLOR_LOOKUP_23_3_BLUE_MASK
#define ALPHA_COLOR_LOOKUP_23_2_MASK
#define ALPHA_COLOR_LOOKUP_23_2_RED_MASK
#define ALPHA_COLOR_LOOKUP_23_2_GREEN_MASK
#define ALPHA_COLOR_LOOKUP_23_2_BLUE_MASK

#define ALPHA_COLOR_LOOKUP_45
#define ALPHA_COLOR_LOOKUP_45_5_MASK
#define ALPHA_COLOR_LOOKUP_45_5_RED_MASK
#define ALPHA_COLOR_LOOKUP_45_5_GREEN_MASK
#define ALPHA_COLOR_LOOKUP_45_5_BLUE_MASK
#define ALPHA_COLOR_LOOKUP_45_4_MASK
#define ALPHA_COLOR_LOOKUP_45_4_RED_MASK
#define ALPHA_COLOR_LOOKUP_45_4_GREEN_MASK
#define ALPHA_COLOR_LOOKUP_45_4_BLUE_MASK

#define ALPHA_COLOR_LOOKUP_67
#define ALPHA_COLOR_LOOKUP_67_7_MASK
#define ALPHA_COLOR_LOOKUP_67_7_RED_MASK
#define ALPHA_COLOR_LOOKUP_67_7_GREEN_MASK
#define ALPHA_COLOR_LOOKUP_67_7_BLUE_MASK
#define ALPHA_COLOR_LOOKUP_67_6_MASK
#define ALPHA_COLOR_LOOKUP_67_6_RED_MASK
#define ALPHA_COLOR_LOOKUP_67_6_GREEN_MASK
#define ALPHA_COLOR_LOOKUP_67_6_BLUE_MASK

#define ALPHA_COLOR_LOOKUP_89
#define ALPHA_COLOR_LOOKUP_89_9_MASK
#define ALPHA_COLOR_LOOKUP_89_9_RED_MASK
#define ALPHA_COLOR_LOOKUP_89_9_GREEN_MASK
#define ALPHA_COLOR_LOOKUP_89_9_BLUE_MASK
#define ALPHA_COLOR_LOOKUP_89_8_MASK
#define ALPHA_COLOR_LOOKUP_89_8_RED_MASK
#define ALPHA_COLOR_LOOKUP_89_8_GREEN_MASK
#define ALPHA_COLOR_LOOKUP_89_8_BLUE_MASK

#define ALPHA_COLOR_LOOKUP_AB
#define ALPHA_COLOR_LOOKUP_AB_B_MASK
#define ALPHA_COLOR_LOOKUP_AB_B_RED_MASK
#define ALPHA_COLOR_LOOKUP_AB_B_GREEN_MASK
#define ALPHA_COLOR_LOOKUP_AB_B_BLUE_MASK
#define ALPHA_COLOR_LOOKUP_AB_A_MASK
#define ALPHA_COLOR_LOOKUP_AB_A_RED_MASK
#define ALPHA_COLOR_LOOKUP_AB_A_GREEN_MASK
#define ALPHA_COLOR_LOOKUP_AB_A_BLUE_MASK

#define ALPHA_COLOR_LOOKUP_CD
#define ALPHA_COLOR_LOOKUP_CD_D_MASK
#define ALPHA_COLOR_LOOKUP_CD_D_RED_MASK
#define ALPHA_COLOR_LOOKUP_CD_D_GREEN_MASK
#define ALPHA_COLOR_LOOKUP_CD_D_BLUE_MASK
#define ALPHA_COLOR_LOOKUP_CD_C_MASK
#define ALPHA_COLOR_LOOKUP_CD_C_RED_MASK
#define ALPHA_COLOR_LOOKUP_CD_C_GREEN_MASK
#define ALPHA_COLOR_LOOKUP_CD_C_BLUE_MASK

#define ALPHA_COLOR_LOOKUP_EF
#define ALPHA_COLOR_LOOKUP_EF_F_MASK
#define ALPHA_COLOR_LOOKUP_EF_F_RED_MASK
#define ALPHA_COLOR_LOOKUP_EF_F_GREEN_MASK
#define ALPHA_COLOR_LOOKUP_EF_F_BLUE_MASK
#define ALPHA_COLOR_LOOKUP_EF_E_MASK
#define ALPHA_COLOR_LOOKUP_EF_E_RED_MASK
#define ALPHA_COLOR_LOOKUP_EF_E_GREEN_MASK
#define ALPHA_COLOR_LOOKUP_EF_E_BLUE_MASK

/* CRT Graphics Control */

#define CRT_DISPLAY_CTRL
#define CRT_DISPLAY_CTRL_RESERVED_MASK

/* SM750LE definition */
#define CRT_DISPLAY_CTRL_DPMS_SHIFT
#define CRT_DISPLAY_CTRL_DPMS_MASK
#define CRT_DISPLAY_CTRL_DPMS_0
#define CRT_DISPLAY_CTRL_DPMS_1
#define CRT_DISPLAY_CTRL_DPMS_2
#define CRT_DISPLAY_CTRL_DPMS_3
#define CRT_DISPLAY_CTRL_CLK_MASK
#define CRT_DISPLAY_CTRL_CLK_PLL25
#define CRT_DISPLAY_CTRL_CLK_PLL41
#define CRT_DISPLAY_CTRL_CLK_PLL62
#define CRT_DISPLAY_CTRL_CLK_PLL65
#define CRT_DISPLAY_CTRL_CLK_PLL74
#define CRT_DISPLAY_CTRL_CLK_PLL80
#define CRT_DISPLAY_CTRL_CLK_PLL108
#define CRT_DISPLAY_CTRL_CLK_RESERVED
#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC

/* SM750LE definition */
#define CRT_DISPLAY_CTRL_CRTSELECT
#define CRT_DISPLAY_CTRL_RGBBIT

#ifndef VALIDATION_CHIP
    #define CRT_DISPLAY_CTRL_CENTERING
#endif
#define CRT_DISPLAY_CTRL_LOCK_TIMING
#define CRT_DISPLAY_CTRL_EXPANSION
#define CRT_DISPLAY_CTRL_VERTICAL_MODE
#define CRT_DISPLAY_CTRL_HORIZONTAL_MODE
#define CRT_DISPLAY_CTRL_SELECT_SHIFT
#define CRT_DISPLAY_CTRL_SELECT_MASK
#define CRT_DISPLAY_CTRL_SELECT_PANEL
#define CRT_DISPLAY_CTRL_SELECT_VGA
#define CRT_DISPLAY_CTRL_SELECT_CRT
#define CRT_DISPLAY_CTRL_FIFO_MASK
#define CRT_DISPLAY_CTRL_FIFO_1
#define CRT_DISPLAY_CTRL_FIFO_3
#define CRT_DISPLAY_CTRL_FIFO_7
#define CRT_DISPLAY_CTRL_FIFO_11
#define CRT_DISPLAY_CTRL_BLANK
#define CRT_DISPLAY_CTRL_PIXEL_MASK
#define CRT_DISPLAY_CTRL_FORMAT_MASK
#define CRT_DISPLAY_CTRL_FORMAT_8
#define CRT_DISPLAY_CTRL_FORMAT_16
#define CRT_DISPLAY_CTRL_FORMAT_32

#define CRT_FB_ADDRESS
#define CRT_FB_ADDRESS_STATUS
#define CRT_FB_ADDRESS_EXT
#define CRT_FB_ADDRESS_ADDRESS_MASK

#define CRT_FB_WIDTH
#define CRT_FB_WIDTH_WIDTH_SHIFT
#define CRT_FB_WIDTH_WIDTH_MASK
#define CRT_FB_WIDTH_OFFSET_MASK

#define CRT_HORIZONTAL_TOTAL
#define CRT_HORIZONTAL_TOTAL_TOTAL_SHIFT
#define CRT_HORIZONTAL_TOTAL_TOTAL_MASK
#define CRT_HORIZONTAL_TOTAL_DISPLAY_END_MASK

#define CRT_HORIZONTAL_SYNC
#define CRT_HORIZONTAL_SYNC_WIDTH_SHIFT
#define CRT_HORIZONTAL_SYNC_WIDTH_MASK
#define CRT_HORIZONTAL_SYNC_START_MASK

#define CRT_VERTICAL_TOTAL
#define CRT_VERTICAL_TOTAL_TOTAL_SHIFT
#define CRT_VERTICAL_TOTAL_TOTAL_MASK
#define CRT_VERTICAL_TOTAL_DISPLAY_END_MASK

#define CRT_VERTICAL_SYNC
#define CRT_VERTICAL_SYNC_HEIGHT_SHIFT
#define CRT_VERTICAL_SYNC_HEIGHT_MASK
#define CRT_VERTICAL_SYNC_START_MASK

#define CRT_SIGNATURE_ANALYZER
#define CRT_SIGNATURE_ANALYZER_STATUS_MASK
#define CRT_SIGNATURE_ANALYZER_ENABLE
#define CRT_SIGNATURE_ANALYZER_RESET
#define CRT_SIGNATURE_ANALYZER_SOURCE_MASK
#define CRT_SIGNATURE_ANALYZER_SOURCE_RED
#define CRT_SIGNATURE_ANALYZER_SOURCE_GREEN
#define CRT_SIGNATURE_ANALYZER_SOURCE_BLUE

#define CRT_CURRENT_LINE
#define CRT_CURRENT_LINE_LINE_MASK

#define CRT_MONITOR_DETECT
#define CRT_MONITOR_DETECT_VALUE
#define CRT_MONITOR_DETECT_ENABLE
#define CRT_MONITOR_DETECT_RED_MASK
#define CRT_MONITOR_DETECT_GREEN_MASK
#define CRT_MONITOR_DETECT_BLUE_MASK

#define CRT_SCALE
#define CRT_SCALE_VERTICAL_MODE
#define CRT_SCALE_VERTICAL_SCALE_MASK
#define CRT_SCALE_HORIZONTAL_MODE
#define CRT_SCALE_HORIZONTAL_SCALE_MASK

/* CRT Cursor Control */

#define CRT_HWC_ADDRESS
#define CRT_HWC_ADDRESS_ENABLE
#define CRT_HWC_ADDRESS_EXT
#define CRT_HWC_ADDRESS_ADDRESS_MASK

#define CRT_HWC_LOCATION
#define CRT_HWC_LOCATION_TOP
#define CRT_HWC_LOCATION_Y_MASK
#define CRT_HWC_LOCATION_LEFT
#define CRT_HWC_LOCATION_X_MASK

#define CRT_HWC_COLOR_12
#define CRT_HWC_COLOR_12_2_RGB565_MASK
#define CRT_HWC_COLOR_12_1_RGB565_MASK

#define CRT_HWC_COLOR_3
#define CRT_HWC_COLOR_3_RGB565_MASK

/* This vertical expansion below start at 0x080240 ~ 0x080264 */
#define CRT_VERTICAL_EXPANSION
#ifndef VALIDATION_CHIP
    #define CRT_VERTICAL_CENTERING_VALUE_MASK
#endif
#define CRT_VERTICAL_EXPANSION_COMPARE_VALUE_MASK
#define CRT_VERTICAL_EXPANSION_LINE_BUFFER_MASK
#define CRT_VERTICAL_EXPANSION_SCALE_FACTOR_MASK

/* This horizontal expansion below start at 0x080268 ~ 0x08027C */
#define CRT_HORIZONTAL_EXPANSION
#ifndef VALIDATION_CHIP
    #define CRT_HORIZONTAL_CENTERING_VALUE_MASK
#endif
#define CRT_HORIZONTAL_EXPANSION_COMPARE_VALUE_MASK
#define CRT_HORIZONTAL_EXPANSION_SCALE_FACTOR_MASK

#ifndef VALIDATION_CHIP
    /* Auto Centering */
    #define CRT_AUTO_CENTERING_TL
    #define CRT_AUTO_CENTERING_TL_TOP_MASK
    #define CRT_AUTO_CENTERING_TL_LEFT_MASK

    #define CRT_AUTO_CENTERING_BR
    #define CRT_AUTO_CENTERING_BR_BOTTOM_MASK
    #define CRT_AUTO_CENTERING_BR_BOTTOM_SHIFT
    #define CRT_AUTO_CENTERING_BR_RIGHT_MASK
#endif

/* sm750le new register to control panel output */
#define DISPLAY_CONTROL_750LE
/* Palette RAM */

/* Panel Palette register starts at 0x080400 ~ 0x0807FC */
#define PANEL_PALETTE_RAM

/* Panel Palette register starts at 0x080C00 ~ 0x080FFC */
#define CRT_PALETTE_RAM

/* Color Space Conversion registers. */

#define CSC_Y_SOURCE_BASE
#define CSC_Y_SOURCE_BASE_EXT
#define CSC_Y_SOURCE_BASE_CS
#define CSC_Y_SOURCE_BASE_ADDRESS_MASK

#define CSC_CONSTANTS
#define CSC_CONSTANTS_Y_MASK
#define CSC_CONSTANTS_R_MASK
#define CSC_CONSTANTS_G_MASK
#define CSC_CONSTANTS_B_MASK

#define CSC_Y_SOURCE_X
#define CSC_Y_SOURCE_X_INTEGER_MASK
#define CSC_Y_SOURCE_X_FRACTION_MASK

#define CSC_Y_SOURCE_Y
#define CSC_Y_SOURCE_Y_INTEGER_MASK
#define CSC_Y_SOURCE_Y_FRACTION_MASK

#define CSC_U_SOURCE_BASE
#define CSC_U_SOURCE_BASE_EXT
#define CSC_U_SOURCE_BASE_CS
#define CSC_U_SOURCE_BASE_ADDRESS_MASK

#define CSC_V_SOURCE_BASE
#define CSC_V_SOURCE_BASE_EXT
#define CSC_V_SOURCE_BASE_CS
#define CSC_V_SOURCE_BASE_ADDRESS_MASK

#define CSC_SOURCE_DIMENSION
#define CSC_SOURCE_DIMENSION_X_MASK
#define CSC_SOURCE_DIMENSION_Y_MASK

#define CSC_SOURCE_PITCH
#define CSC_SOURCE_PITCH_Y_MASK
#define CSC_SOURCE_PITCH_UV_MASK

#define CSC_DESTINATION
#define CSC_DESTINATION_WRAP
#define CSC_DESTINATION_X_MASK
#define CSC_DESTINATION_Y_MASK

#define CSC_DESTINATION_DIMENSION
#define CSC_DESTINATION_DIMENSION_X_MASK
#define CSC_DESTINATION_DIMENSION_Y_MASK

#define CSC_DESTINATION_PITCH
#define CSC_DESTINATION_PITCH_X_MASK
#define CSC_DESTINATION_PITCH_Y_MASK

#define CSC_SCALE_FACTOR
#define CSC_SCALE_FACTOR_HORIZONTAL_MASK
#define CSC_SCALE_FACTOR_VERTICAL_MASK

#define CSC_DESTINATION_BASE
#define CSC_DESTINATION_BASE_EXT
#define CSC_DESTINATION_BASE_CS
#define CSC_DESTINATION_BASE_ADDRESS_MASK

#define CSC_CONTROL
#define CSC_CONTROL_STATUS
#define CSC_CONTROL_SOURCE_FORMAT_MASK
#define CSC_CONTROL_SOURCE_FORMAT_YUV422
#define CSC_CONTROL_SOURCE_FORMAT_YUV420I
#define CSC_CONTROL_SOURCE_FORMAT_YUV420
#define CSC_CONTROL_SOURCE_FORMAT_YVU9
#define CSC_CONTROL_SOURCE_FORMAT_IYU1
#define CSC_CONTROL_SOURCE_FORMAT_IYU2
#define CSC_CONTROL_SOURCE_FORMAT_RGB565
#define CSC_CONTROL_SOURCE_FORMAT_RGB8888
#define CSC_CONTROL_DESTINATION_FORMAT_MASK
#define CSC_CONTROL_DESTINATION_FORMAT_RGB565
#define CSC_CONTROL_DESTINATION_FORMAT_RGB8888
#define CSC_CONTROL_HORIZONTAL_FILTER
#define CSC_CONTROL_VERTICAL_FILTER
#define CSC_CONTROL_BYTE_ORDER

#define DE_DATA_PORT

#define I2C_BYTE_COUNT
#define I2C_BYTE_COUNT_COUNT_MASK

#define I2C_CTRL
#define I2C_CTRL_INT
#define I2C_CTRL_DIR
#define I2C_CTRL_CTRL
#define I2C_CTRL_MODE
#define I2C_CTRL_EN

#define I2C_STATUS
#define I2C_STATUS_TX
#define I2C_STATUS_ERR
#define I2C_STATUS_ACK
#define I2C_STATUS_BSY

#define I2C_RESET
#define I2C_RESET_BUS_ERROR

#define I2C_SLAVE_ADDRESS
#define I2C_SLAVE_ADDRESS_ADDRESS_MASK
#define I2C_SLAVE_ADDRESS_RW

#define I2C_DATA0
#define I2C_DATA1
#define I2C_DATA2
#define I2C_DATA3
#define I2C_DATA4
#define I2C_DATA5
#define I2C_DATA6
#define I2C_DATA7
#define I2C_DATA8
#define I2C_DATA9
#define I2C_DATA10
#define I2C_DATA11
#define I2C_DATA12
#define I2C_DATA13
#define I2C_DATA14
#define I2C_DATA15

#define ZV0_CAPTURE_CTRL
#define ZV0_CAPTURE_CTRL_FIELD_INPUT
#define ZV0_CAPTURE_CTRL_SCAN
#define ZV0_CAPTURE_CTRL_CURRENT_BUFFER
#define ZV0_CAPTURE_CTRL_VERTICAL_SYNC
#define ZV0_CAPTURE_CTRL_ADJ
#define ZV0_CAPTURE_CTRL_HA
#define ZV0_CAPTURE_CTRL_VSK
#define ZV0_CAPTURE_CTRL_HSK
#define ZV0_CAPTURE_CTRL_FD
#define ZV0_CAPTURE_CTRL_VP
#define ZV0_CAPTURE_CTRL_HP
#define ZV0_CAPTURE_CTRL_CP
#define ZV0_CAPTURE_CTRL_UVS
#define ZV0_CAPTURE_CTRL_BS
#define ZV0_CAPTURE_CTRL_CS
#define ZV0_CAPTURE_CTRL_CF
#define ZV0_CAPTURE_CTRL_FS
#define ZV0_CAPTURE_CTRL_WEAVE
#define ZV0_CAPTURE_CTRL_BOB
#define ZV0_CAPTURE_CTRL_DB
#define ZV0_CAPTURE_CTRL_CC
#define ZV0_CAPTURE_CTRL_RGB
#define ZV0_CAPTURE_CTRL_656
#define ZV0_CAPTURE_CTRL_CAP

#define ZV0_CAPTURE_CLIP
#define ZV0_CAPTURE_CLIP_EYCLIP_MASK
#define ZV0_CAPTURE_CLIP_XCLIP_MASK

#define ZV0_CAPTURE_SIZE
#define ZV0_CAPTURE_SIZE_HEIGHT_MASK
#define ZV0_CAPTURE_SIZE_WIDTH_MASK

#define ZV0_CAPTURE_BUF0_ADDRESS
#define ZV0_CAPTURE_BUF0_ADDRESS_STATUS
#define ZV0_CAPTURE_BUF0_ADDRESS_EXT
#define ZV0_CAPTURE_BUF0_ADDRESS_CS
#define ZV0_CAPTURE_BUF0_ADDRESS_ADDRESS_MASK

#define ZV0_CAPTURE_BUF1_ADDRESS
#define ZV0_CAPTURE_BUF1_ADDRESS_STATUS
#define ZV0_CAPTURE_BUF1_ADDRESS_EXT
#define ZV0_CAPTURE_BUF1_ADDRESS_CS
#define ZV0_CAPTURE_BUF1_ADDRESS_ADDRESS_MASK

#define ZV0_CAPTURE_BUF_OFFSET
#ifndef VALIDATION_CHIP
    #define ZV0_CAPTURE_BUF_OFFSET_YCLIP_ODD_FIELD
#endif
#define ZV0_CAPTURE_BUF_OFFSET_OFFSET_MASK

#define ZV0_CAPTURE_FIFO_CTRL
#define ZV0_CAPTURE_FIFO_CTRL_FIFO_MASK
#define ZV0_CAPTURE_FIFO_CTRL_FIFO_0
#define ZV0_CAPTURE_FIFO_CTRL_FIFO_1
#define ZV0_CAPTURE_FIFO_CTRL_FIFO_2
#define ZV0_CAPTURE_FIFO_CTRL_FIFO_3
#define ZV0_CAPTURE_FIFO_CTRL_FIFO_4
#define ZV0_CAPTURE_FIFO_CTRL_FIFO_5
#define ZV0_CAPTURE_FIFO_CTRL_FIFO_6
#define ZV0_CAPTURE_FIFO_CTRL_FIFO_7

#define ZV0_CAPTURE_YRGB_CONST
#define ZV0_CAPTURE_YRGB_CONST_Y_MASK
#define ZV0_CAPTURE_YRGB_CONST_R_MASK
#define ZV0_CAPTURE_YRGB_CONST_G_MASK
#define ZV0_CAPTURE_YRGB_CONST_B_MASK

#define ZV0_CAPTURE_LINE_COMP
#define ZV0_CAPTURE_LINE_COMP_LC_MASK

/* ZV1 */

#define ZV1_CAPTURE_CTRL
#define ZV1_CAPTURE_CTRL_FIELD_INPUT
#define ZV1_CAPTURE_CTRL_SCAN
#define ZV1_CAPTURE_CTRL_CURRENT_BUFFER
#define ZV1_CAPTURE_CTRL_VERTICAL_SYNC
#define ZV1_CAPTURE_CTRL_PANEL
#define ZV1_CAPTURE_CTRL_ADJ
#define ZV1_CAPTURE_CTRL_HA
#define ZV1_CAPTURE_CTRL_VSK
#define ZV1_CAPTURE_CTRL_HSK
#define ZV1_CAPTURE_CTRL_FD
#define ZV1_CAPTURE_CTRL_VP
#define ZV1_CAPTURE_CTRL_HP
#define ZV1_CAPTURE_CTRL_CP
#define ZV1_CAPTURE_CTRL_UVS
#define ZV1_CAPTURE_CTRL_BS
#define ZV1_CAPTURE_CTRL_CS
#define ZV1_CAPTURE_CTRL_CF
#define ZV1_CAPTURE_CTRL_FS
#define ZV1_CAPTURE_CTRL_WEAVE
#define ZV1_CAPTURE_CTRL_BOB
#define ZV1_CAPTURE_CTRL_DB
#define ZV1_CAPTURE_CTRL_CC
#define ZV1_CAPTURE_CTRL_RGB
#define ZV1_CAPTURE_CTRL_656
#define ZV1_CAPTURE_CTRL_CAP

#define ZV1_CAPTURE_CLIP
#define ZV1_CAPTURE_CLIP_YCLIP_MASK
#define ZV1_CAPTURE_CLIP_XCLIP_MASK

#define ZV1_CAPTURE_SIZE
#define ZV1_CAPTURE_SIZE_HEIGHT_MASK
#define ZV1_CAPTURE_SIZE_WIDTH_MASK

#define ZV1_CAPTURE_BUF0_ADDRESS
#define ZV1_CAPTURE_BUF0_ADDRESS_STATUS
#define ZV1_CAPTURE_BUF0_ADDRESS_EXT
#define ZV1_CAPTURE_BUF0_ADDRESS_CS
#define ZV1_CAPTURE_BUF0_ADDRESS_ADDRESS_MASK

#define ZV1_CAPTURE_BUF1_ADDRESS
#define ZV1_CAPTURE_BUF1_ADDRESS_STATUS
#define ZV1_CAPTURE_BUF1_ADDRESS_EXT
#define ZV1_CAPTURE_BUF1_ADDRESS_CS
#define ZV1_CAPTURE_BUF1_ADDRESS_ADDRESS_MASK

#define ZV1_CAPTURE_BUF_OFFSET
#define ZV1_CAPTURE_BUF_OFFSET_OFFSET_MASK

#define ZV1_CAPTURE_FIFO_CTRL
#define ZV1_CAPTURE_FIFO_CTRL_FIFO_MASK
#define ZV1_CAPTURE_FIFO_CTRL_FIFO_0
#define ZV1_CAPTURE_FIFO_CTRL_FIFO_1
#define ZV1_CAPTURE_FIFO_CTRL_FIFO_2
#define ZV1_CAPTURE_FIFO_CTRL_FIFO_3
#define ZV1_CAPTURE_FIFO_CTRL_FIFO_4
#define ZV1_CAPTURE_FIFO_CTRL_FIFO_5
#define ZV1_CAPTURE_FIFO_CTRL_FIFO_6
#define ZV1_CAPTURE_FIFO_CTRL_FIFO_7

#define ZV1_CAPTURE_YRGB_CONST
#define ZV1_CAPTURE_YRGB_CONST_Y_MASK
#define ZV1_CAPTURE_YRGB_CONST_R_MASK
#define ZV1_CAPTURE_YRGB_CONST_G_MASK
#define ZV1_CAPTURE_YRGB_CONST_B_MASK

#define DMA_1_SOURCE
#define DMA_1_SOURCE_ADDRESS_EXT
#define DMA_1_SOURCE_ADDRESS_CS
#define DMA_1_SOURCE_ADDRESS_MASK

#define DMA_1_DESTINATION
#define DMA_1_DESTINATION_ADDRESS_EXT
#define DMA_1_DESTINATION_ADDRESS_CS
#define DMA_1_DESTINATION_ADDRESS_MASK

#define DMA_1_SIZE_CONTROL
#define DMA_1_SIZE_CONTROL_STATUS
#define DMA_1_SIZE_CONTROL_SIZE_MASK

#define DMA_ABORT_INTERRUPT
#define DMA_ABORT_INTERRUPT_ABORT_1
#define DMA_ABORT_INTERRUPT_ABORT_0
#define DMA_ABORT_INTERRUPT_INT_1
#define DMA_ABORT_INTERRUPT_INT_0

/* Default i2c CLK and Data GPIO. These are the default i2c pins */
#define DEFAULT_I2C_SCL
#define DEFAULT_I2C_SDA

#define GPIO_DATA_SM750LE
#define GPIO_DATA_SM750LE_1
#define GPIO_DATA_SM750LE_0

#define GPIO_DATA_DIRECTION_SM750LE
#define GPIO_DATA_DIRECTION_SM750LE_1
#define GPIO_DATA_DIRECTION_SM750LE_0

#endif