#ifndef _ASM_X86_INTEL_PUNIT_IPC_H_
#define _ASM_X86_INTEL_PUNIT_IPC_H_
IPC_TYPE;
#define IPC_TYPE_OFFSET …
#define IPC_PUNIT_BIOS_CMD_BASE …
#define IPC_PUNIT_GTD_CMD_BASE …
#define IPC_PUNIT_ISPD_CMD_BASE …
#define IPC_PUNIT_CMD_TYPE_MASK …
#define IPC_PUNIT_BIOS_ZERO …
#define IPC_PUNIT_BIOS_VR_INTERFACE …
#define IPC_PUNIT_BIOS_READ_PCS …
#define IPC_PUNIT_BIOS_WRITE_PCS …
#define IPC_PUNIT_BIOS_READ_PCU_CONFIG …
#define IPC_PUNIT_BIOS_WRITE_PCU_CONFIG …
#define IPC_PUNIT_BIOS_READ_PL1_SETTING …
#define IPC_PUNIT_BIOS_WRITE_PL1_SETTING …
#define IPC_PUNIT_BIOS_TRIGGER_VDD_RAM …
#define IPC_PUNIT_BIOS_READ_TELE_INFO …
#define IPC_PUNIT_BIOS_READ_TELE_TRACE_CTRL …
#define IPC_PUNIT_BIOS_WRITE_TELE_TRACE_CTRL …
#define IPC_PUNIT_BIOS_READ_TELE_EVENT_CTRL …
#define IPC_PUNIT_BIOS_WRITE_TELE_EVENT_CTRL …
#define IPC_PUNIT_BIOS_READ_TELE_TRACE …
#define IPC_PUNIT_BIOS_WRITE_TELE_TRACE …
#define IPC_PUNIT_BIOS_READ_TELE_EVENT …
#define IPC_PUNIT_BIOS_WRITE_TELE_EVENT …
#define IPC_PUNIT_BIOS_READ_MODULE_TEMP …
#define IPC_PUNIT_BIOS_RESERVED …
#define IPC_PUNIT_BIOS_READ_VOLTAGE_OVER …
#define IPC_PUNIT_BIOS_WRITE_VOLTAGE_OVER …
#define IPC_PUNIT_BIOS_READ_RATIO_OVER …
#define IPC_PUNIT_BIOS_WRITE_RATIO_OVER …
#define IPC_PUNIT_BIOS_READ_VF_GL_CTRL …
#define IPC_PUNIT_BIOS_WRITE_VF_GL_CTRL …
#define IPC_PUNIT_BIOS_READ_FM_SOC_TEMP_THRESH …
#define IPC_PUNIT_BIOS_WRITE_FM_SOC_TEMP_THRESH …
#define IPC_PUNIT_GTD_ZERO …
#define IPC_PUNIT_GTD_CONFIG …
#define IPC_PUNIT_GTD_READ_ICCP_LIC_CDYN_SCAL …
#define IPC_PUNIT_GTD_WRITE_ICCP_LIC_CDYN_SCAL …
#define IPC_PUNIT_GTD_GET_WM_VAL …
#define IPC_PUNIT_GTD_WRITE_CONFIG_WISHREQ …
#define IPC_PUNIT_GTD_READ_REQ_DUTY_CYCLE …
#define IPC_PUNIT_GTD_DIS_VOL_FREQ_CHG_REQUEST …
#define IPC_PUNIT_GTD_DYNA_DUTY_CYCLE_CTRL …
#define IPC_PUNIT_GTD_DYNA_DUTY_CYCLE_TUNING …
#define IPC_PUNIT_ISPD_ZERO …
#define IPC_PUNIT_ISPD_CONFIG …
#define IPC_PUNIT_ISPD_GET_ISP_LTR_VAL …
#define IPC_PUNIT_ISPD_ACCESS_IU_FREQ_BOUNDS …
#define IPC_PUNIT_ISPD_READ_CDYN_LEVEL …
#define IPC_PUNIT_ISPD_WRITE_CDYN_LEVEL …
#define IPC_PUNIT_ERR_SUCCESS …
#define IPC_PUNIT_ERR_INVALID_CMD …
#define IPC_PUNIT_ERR_INVALID_PARAMETER …
#define IPC_PUNIT_ERR_CMD_TIMEOUT …
#define IPC_PUNIT_ERR_CMD_LOCKED …
#define IPC_PUNIT_ERR_INVALID_VR_ID …
#define IPC_PUNIT_ERR_VR_ERR …
#if IS_ENABLED(CONFIG_INTEL_PUNIT_IPC)
int intel_punit_ipc_simple_command(int cmd, int para1, int para2);
int intel_punit_ipc_command(u32 cmd, u32 para1, u32 para2, u32 *in, u32 *out);
#else
static inline int intel_punit_ipc_simple_command(int cmd,
int para1, int para2)
{
return -ENODEV;
}
static inline int intel_punit_ipc_command(u32 cmd, u32 para1, u32 para2,
u32 *in, u32 *out)
{
return -ENODEV;
}
#endif
#endif