linux/drivers/soundwire/intel.h

/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
/* Copyright(c) 2015-17 Intel Corporation. */

#ifndef __SDW_INTEL_LOCAL_H
#define __SDW_INTEL_LOCAL_H

struct hdac_bus;

/**
 * struct sdw_intel_link_res - Soundwire Intel link resource structure,
 * typically populated by the controller driver.
 * @hw_ops: platform-specific ops
 * @mmio_base: mmio base of SoundWire registers
 * @registers: Link IO registers base
 * @ip_offset: offset for MCP_IP registers
 * @shim: Audio shim pointer
 * @shim_vs: Audio vendor-specific shim pointer
 * @alh: ALH (Audio Link Hub) pointer
 * @irq: Interrupt line
 * @ops: Shim callback ops
 * @dev: device implementing hw_params and free callbacks
 * @shim_lock: mutex to handle access to shared SHIM registers
 * @shim_mask: global pointer to check SHIM register initialization
 * @clock_stop_quirks: mask defining requested behavior on pm_suspend
 * @link_mask: global mask needed for power-up/down sequences
 * @cdns: Cadence master descriptor
 * @list: used to walk-through all masters exposed by the same controller
 * @hbus: hdac_bus pointer, needed for power management
 */
struct sdw_intel_link_res { … };

struct sdw_intel { … };

struct sdw_intel_prop { … };

enum intel_pdi_type { … };

/*
 * Read, write helpers for HW registers
 */
static inline int intel_readl(void __iomem *base, int offset)
{ … }

static inline void intel_writel(void __iomem *base, int offset, int value)
{ … }

static inline u16 intel_readw(void __iomem *base, int offset)
{ … }

static inline void intel_writew(void __iomem *base, int offset, u16 value)
{ … }

#define cdns_to_intel(_cdns) …

#define INTEL_MASTER_RESET_ITERATIONS …

#define SDW_INTEL_DELAYED_ENUMERATION_MS …

#define SDW_INTEL_CHECK_OPS(sdw, cb) …
#define SDW_INTEL_OPS(sdw, cb) …

#ifdef CONFIG_DEBUG_FS
void intel_ace2x_debugfs_init(struct sdw_intel *sdw);
void intel_ace2x_debugfs_exit(struct sdw_intel *sdw);
#else
static inline void intel_ace2x_debugfs_init(struct sdw_intel *sdw) {}
static inline void intel_ace2x_debugfs_exit(struct sdw_intel *sdw) {}
#endif

static inline void sdw_intel_debugfs_init(struct sdw_intel *sdw)
{ … }

static inline void sdw_intel_debugfs_exit(struct sdw_intel *sdw)
{ … }

static inline int sdw_intel_register_dai(struct sdw_intel *sdw)
{ … }

static inline void sdw_intel_check_clock_stop(struct sdw_intel *sdw)
{ … }

static inline int sdw_intel_start_bus(struct sdw_intel *sdw)
{ … }

static inline int sdw_intel_start_bus_after_reset(struct sdw_intel *sdw)
{ … }

static inline int sdw_intel_start_bus_after_clock_stop(struct sdw_intel *sdw)
{ … }

static inline int sdw_intel_stop_bus(struct sdw_intel *sdw, bool clock_stop)
{ … }

static inline int sdw_intel_link_power_up(struct sdw_intel *sdw)
{ … }

static inline int sdw_intel_link_power_down(struct sdw_intel *sdw)
{ … }

static inline int sdw_intel_shim_check_wake(struct sdw_intel *sdw)
{ … }

static inline void sdw_intel_shim_wake(struct sdw_intel *sdw, bool wake_enable)
{ … }

static inline void sdw_intel_sync_arm(struct sdw_intel *sdw)
{ … }

static inline int sdw_intel_sync_go_unlocked(struct sdw_intel *sdw)
{ … }

static inline int sdw_intel_sync_go(struct sdw_intel *sdw)
{ … }

static inline bool sdw_intel_sync_check_cmdsync_unlocked(struct sdw_intel *sdw)
{ … }

static inline int sdw_intel_get_link_count(struct sdw_intel *sdw)
{ … }

/* common bus management */
int intel_start_bus(struct sdw_intel *sdw);
int intel_start_bus_after_reset(struct sdw_intel *sdw);
void intel_check_clock_stop(struct sdw_intel *sdw);
int intel_start_bus_after_clock_stop(struct sdw_intel *sdw);
int intel_stop_bus(struct sdw_intel *sdw, bool clock_stop);

/* common bank switch routines */
int intel_pre_bank_switch(struct sdw_intel *sdw);
int intel_post_bank_switch(struct sdw_intel *sdw);

#endif /* __SDW_INTEL_LOCAL_H */