/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2015 Samsung Electronics Co., Ltd. * http://www.samsung.com * * Exynos SROMC register definitions */ #ifndef __EXYNOS_SROM_H #define __EXYNOS_SROM_H … #define EXYNOS_SROMREG(x) … #define EXYNOS_SROM_BW … #define EXYNOS_SROM_BC0 … #define EXYNOS_SROM_BC1 … #define EXYNOS_SROM_BC2 … #define EXYNOS_SROM_BC3 … #define EXYNOS_SROM_BC4 … #define EXYNOS_SROM_BC5 … /* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */ #define EXYNOS_SROM_BW__DATAWIDTH__SHIFT … #define EXYNOS_SROM_BW__ADDRMODE__SHIFT … #define EXYNOS_SROM_BW__WAITENABLE__SHIFT … #define EXYNOS_SROM_BW__BYTEENABLE__SHIFT … #define EXYNOS_SROM_BW__CS_MASK … #define EXYNOS_SROM_BW__NCS0__SHIFT … #define EXYNOS_SROM_BW__NCS1__SHIFT … #define EXYNOS_SROM_BW__NCS2__SHIFT … #define EXYNOS_SROM_BW__NCS3__SHIFT … #define EXYNOS_SROM_BW__NCS4__SHIFT … #define EXYNOS_SROM_BW__NCS5__SHIFT … /* applies to same to BCS0 - BCS3 */ #define EXYNOS_SROM_BCX__PMC__SHIFT … #define EXYNOS_SROM_BCX__TACP__SHIFT … #define EXYNOS_SROM_BCX__TCAH__SHIFT … #define EXYNOS_SROM_BCX__TCOH__SHIFT … #define EXYNOS_SROM_BCX__TACC__SHIFT … #define EXYNOS_SROM_BCX__TCOS__SHIFT … #define EXYNOS_SROM_BCX__TACS__SHIFT … #endif /* __EXYNOS_SROM_H */
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