linux/drivers/memory/tegra/tegra210-mc.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2015-2020, NVIDIA CORPORATION.  All rights reserved.
 */

#ifndef TEGRA210_MC_H
#define TEGRA210_MC_H

#include "mc.h"

/* register definitions */
#define MC_LATENCY_ALLOWANCE_AVPC_0
#define MC_LATENCY_ALLOWANCE_HC_0
#define MC_LATENCY_ALLOWANCE_HC_1
#define MC_LATENCY_ALLOWANCE_MPCORE_0
#define MC_LATENCY_ALLOWANCE_NVENC_0
#define MC_LATENCY_ALLOWANCE_PPCS_0
#define MC_LATENCY_ALLOWANCE_PPCS_1
#define MC_LATENCY_ALLOWANCE_ISP2_0
#define MC_LATENCY_ALLOWANCE_ISP2_1
#define MC_LATENCY_ALLOWANCE_XUSB_0
#define MC_LATENCY_ALLOWANCE_XUSB_1
#define MC_LATENCY_ALLOWANCE_TSEC_0
#define MC_LATENCY_ALLOWANCE_VIC_0
#define MC_LATENCY_ALLOWANCE_VI2_0
#define MC_LATENCY_ALLOWANCE_GPU_0
#define MC_LATENCY_ALLOWANCE_SDMMCA_0
#define MC_LATENCY_ALLOWANCE_SDMMCAA_0
#define MC_LATENCY_ALLOWANCE_SDMMC_0
#define MC_LATENCY_ALLOWANCE_SDMMCAB_0
#define MC_LATENCY_ALLOWANCE_GPU2_0
#define MC_LATENCY_ALLOWANCE_NVDEC_0
#define MC_MLL_MPCORER_PTSA_RATE
#define MC_FTOP_PTSA_RATE
#define MC_EMEM_ARB_TIMING_RFCPB
#define MC_EMEM_ARB_TIMING_CCDMW
#define MC_EMEM_ARB_REFPB_HP_CTRL
#define MC_EMEM_ARB_REFPB_BANK_CTRL
#define MC_PTSA_GRANT_DECREMENT
#define MC_EMEM_ARB_DHYST_CTRL
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_0
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_1
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_2
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_3
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_4
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_5
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_6
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_7

#endif