// SPDX-License-Identifier: GPL-2.0 /* * mma8452.c - Support for following Freescale / NXP 3-axis accelerometers: * * device name digital output 7-bit I2C slave address (pin selectable) * --------------------------------------------------------------------- * MMA8451Q 14 bit 0x1c / 0x1d * MMA8452Q 12 bit 0x1c / 0x1d * MMA8453Q 10 bit 0x1c / 0x1d * MMA8652FC 12 bit 0x1d * MMA8653FC 10 bit 0x1d * FXLS8471Q 14 bit 0x1e / 0x1d / 0x1c / 0x1f * * Copyright 2015 Martin Kepplinger <[email protected]> * Copyright 2014 Peter Meerwald <[email protected]> * * * TODO: orientation events */ #include <linux/module.h> #include <linux/mod_devicetable.h> #include <linux/property.h> #include <linux/i2c.h> #include <linux/iio/iio.h> #include <linux/iio/sysfs.h> #include <linux/iio/buffer.h> #include <linux/iio/trigger.h> #include <linux/iio/trigger_consumer.h> #include <linux/iio/triggered_buffer.h> #include <linux/iio/events.h> #include <linux/delay.h> #include <linux/pm_runtime.h> #include <linux/regulator/consumer.h> #define MMA8452_STATUS … #define MMA8452_STATUS_DRDY … #define MMA8452_OUT_X … #define MMA8452_OUT_Y … #define MMA8452_OUT_Z … #define MMA8452_INT_SRC … #define MMA8452_WHO_AM_I … #define MMA8452_DATA_CFG … #define MMA8452_DATA_CFG_FS_MASK … #define MMA8452_DATA_CFG_FS_2G … #define MMA8452_DATA_CFG_FS_4G … #define MMA8452_DATA_CFG_FS_8G … #define MMA8452_DATA_CFG_HPF_MASK … #define MMA8452_HP_FILTER_CUTOFF … #define MMA8452_HP_FILTER_CUTOFF_SEL_MASK … #define MMA8452_FF_MT_CFG … #define MMA8452_FF_MT_CFG_OAE … #define MMA8452_FF_MT_CFG_ELE … #define MMA8452_FF_MT_SRC … #define MMA8452_FF_MT_SRC_XHE … #define MMA8452_FF_MT_SRC_YHE … #define MMA8452_FF_MT_SRC_ZHE … #define MMA8452_FF_MT_THS … #define MMA8452_FF_MT_THS_MASK … #define MMA8452_FF_MT_COUNT … #define MMA8452_FF_MT_CHAN_SHIFT … #define MMA8452_TRANSIENT_CFG … #define MMA8452_TRANSIENT_CFG_CHAN(chan) … #define MMA8452_TRANSIENT_CFG_HPF_BYP … #define MMA8452_TRANSIENT_CFG_ELE … #define MMA8452_TRANSIENT_SRC … #define MMA8452_TRANSIENT_SRC_XTRANSE … #define MMA8452_TRANSIENT_SRC_YTRANSE … #define MMA8452_TRANSIENT_SRC_ZTRANSE … #define MMA8452_TRANSIENT_THS … #define MMA8452_TRANSIENT_THS_MASK … #define MMA8452_TRANSIENT_COUNT … #define MMA8452_TRANSIENT_CHAN_SHIFT … #define MMA8452_CTRL_REG1 … #define MMA8452_CTRL_ACTIVE … #define MMA8452_CTRL_DR_MASK … #define MMA8452_CTRL_DR_SHIFT … #define MMA8452_CTRL_DR_DEFAULT … #define MMA8452_CTRL_REG2 … #define MMA8452_CTRL_REG2_RST … #define MMA8452_CTRL_REG2_MODS_SHIFT … #define MMA8452_CTRL_REG2_MODS_MASK … #define MMA8452_CTRL_REG4 … #define MMA8452_CTRL_REG5 … #define MMA8452_OFF_X … #define MMA8452_OFF_Y … #define MMA8452_OFF_Z … #define MMA8452_MAX_REG … #define MMA8452_INT_DRDY … #define MMA8452_INT_FF_MT … #define MMA8452_INT_TRANS … #define MMA8451_DEVICE_ID … #define MMA8452_DEVICE_ID … #define MMA8453_DEVICE_ID … #define MMA8652_DEVICE_ID … #define MMA8653_DEVICE_ID … #define FXLS8471_DEVICE_ID … #define MMA8452_AUTO_SUSPEND_DELAY_MS … struct mma8452_data { … }; /** * struct mma8452_event_regs - chip specific data related to events * @ev_cfg: event config register address * @ev_cfg_ele: latch bit in event config register * @ev_cfg_chan_shift: number of the bit to enable events in X * direction; in event config register * @ev_src: event source register address * @ev_ths: event threshold register address * @ev_ths_mask: mask for the threshold value * @ev_count: event count (period) register address * * Since not all chips supported by the driver support comparing high pass * filtered data for events (interrupts), different interrupt sources are * used for different chips and the relevant registers are included here. */ struct mma8452_event_regs { … }; static const struct mma8452_event_regs ff_mt_ev_regs = …; static const struct mma8452_event_regs trans_ev_regs = …; /** * struct mma_chip_info - chip specific data * @name: part number of device reported via 'name' attr * @chip_id: WHO_AM_I register's value * @channels: struct iio_chan_spec matching the device's * capabilities * @num_channels: number of channels * @mma_scales: scale factors for converting register values * to m/s^2; 3 modes: 2g, 4g, 8g; 2 integers * per mode: m/s^2 and micro m/s^2 * @all_events: all events supported by this chip * @enabled_events: event flags enabled and handled by this driver */ struct mma_chip_info { … }; enum { … }; static int mma8452_drdy(struct mma8452_data *data) { … } static int mma8452_set_runtime_pm_state(struct i2c_client *client, bool on) { … } static int mma8452_read(struct mma8452_data *data, __be16 buf[3]) { … } static ssize_t mma8452_show_int_plus_micros(char *buf, const int (*vals)[2], int n) { … } static int mma8452_get_int_plus_micros_index(const int (*vals)[2], int n, int val, int val2) { … } static unsigned int mma8452_get_odr_index(struct mma8452_data *data) { … } static const int mma8452_samp_freq[8][2] = …; /* Datasheet table: step time "Relationship with the ODR" (sample frequency) */ static const unsigned int mma8452_time_step_us[4][8] = …; /* Datasheet table "High-Pass Filter Cutoff Options" */ static const int mma8452_hp_filter_cutoff[4][8][4][2] = …; /* Datasheet table "MODS Oversampling modes averaging values at each ODR" */ static const u16 mma8452_os_ratio[4][8] = …; static int mma8452_get_power_mode(struct mma8452_data *data) { … } static ssize_t mma8452_show_samp_freq_avail(struct device *dev, struct device_attribute *attr, char *buf) { … } static ssize_t mma8452_show_scale_avail(struct device *dev, struct device_attribute *attr, char *buf) { … } static ssize_t mma8452_show_hp_cutoff_avail(struct device *dev, struct device_attribute *attr, char *buf) { … } static ssize_t mma8452_show_os_ratio_avail(struct device *dev, struct device_attribute *attr, char *buf) { … } static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(mma8452_show_samp_freq_avail); static IIO_DEVICE_ATTR(in_accel_scale_available, 0444, mma8452_show_scale_avail, NULL, 0); static IIO_DEVICE_ATTR(in_accel_filter_high_pass_3db_frequency_available, 0444, mma8452_show_hp_cutoff_avail, NULL, 0); static IIO_DEVICE_ATTR(in_accel_oversampling_ratio_available, 0444, mma8452_show_os_ratio_avail, NULL, 0); static int mma8452_get_samp_freq_index(struct mma8452_data *data, int val, int val2) { … } static int mma8452_get_scale_index(struct mma8452_data *data, int val, int val2) { … } static int mma8452_get_hp_filter_index(struct mma8452_data *data, int val, int val2) { … } static int mma8452_read_hp_filter(struct mma8452_data *data, int *hz, int *uHz) { … } static int mma8452_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) { … } static int mma8452_calculate_sleep(struct mma8452_data *data) { … } static int mma8452_standby(struct mma8452_data *data) { … } static int mma8452_active(struct mma8452_data *data) { … } /* returns >0 if active, 0 if in standby and <0 on error */ static int mma8452_is_active(struct mma8452_data *data) { … } static int mma8452_change_config(struct mma8452_data *data, u8 reg, u8 val) { … } static int mma8452_set_power_mode(struct mma8452_data *data, u8 mode) { … } /* returns >0 if in freefall mode, 0 if not or <0 if an error occurred */ static int mma8452_freefall_mode_enabled(struct mma8452_data *data) { … } static int mma8452_set_freefall_mode(struct mma8452_data *data, bool state) { … } static int mma8452_set_hp_filter_frequency(struct mma8452_data *data, int val, int val2) { … } static int mma8452_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) { … } static int mma8452_get_event_regs(struct mma8452_data *data, const struct iio_chan_spec *chan, enum iio_event_direction dir, const struct mma8452_event_regs **ev_reg) { … } static int mma8452_read_event_value(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, enum iio_event_info info, int *val, int *val2) { … } static int mma8452_write_event_value(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, enum iio_event_info info, int val, int val2) { … } static int mma8452_read_event_config(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir) { … } static int mma8452_write_event_config(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, enum iio_event_direction dir, int state) { … } static void mma8452_transient_interrupt(struct iio_dev *indio_dev) { … } static irqreturn_t mma8452_interrupt(int irq, void *p) { … } static irqreturn_t mma8452_trigger_handler(int irq, void *p) { … } static int mma8452_reg_access_dbg(struct iio_dev *indio_dev, unsigned int reg, unsigned int writeval, unsigned int *readval) { … } static const struct iio_event_spec mma8452_freefall_event[] = …; static const struct iio_event_spec mma8652_freefall_event[] = …; static const struct iio_event_spec mma8452_transient_event[] = …; static const struct iio_event_spec mma8452_motion_event[] = …; /* * Threshold is configured in fixed 8G/127 steps regardless of * currently selected scale for measurement. */ static IIO_CONST_ATTR_NAMED(accel_transient_scale, in_accel_scale, "0.617742"); static struct attribute *mma8452_event_attributes[] = …; static const struct attribute_group mma8452_event_attribute_group = …; static const struct iio_mount_matrix * mma8452_get_mount_matrix(const struct iio_dev *indio_dev, const struct iio_chan_spec *chan) { … } static const struct iio_chan_spec_ext_info mma8452_ext_info[] = …; #define MMA8452_FREEFALL_CHANNEL(modifier) … #define MMA8652_FREEFALL_CHANNEL(modifier) … #define MMA8452_CHANNEL(axis, idx, bits) … #define MMA8652_CHANNEL(axis, idx, bits) … static const struct iio_chan_spec mma8451_channels[] = …; static const struct iio_chan_spec mma8452_channels[] = …; static const struct iio_chan_spec mma8453_channels[] = …; static const struct iio_chan_spec mma8652_channels[] = …; static const struct iio_chan_spec mma8653_channels[] = …; enum { … }; static const struct mma_chip_info mma_chip_info_table[] = …; static struct attribute *mma8452_attributes[] = …; static const struct attribute_group mma8452_group = …; static const struct iio_info mma8452_info = …; static const unsigned long mma8452_scan_masks[] = …; static int mma8452_data_rdy_trigger_set_state(struct iio_trigger *trig, bool state) { … } static const struct iio_trigger_ops mma8452_trigger_ops = …; static int mma8452_trigger_setup(struct iio_dev *indio_dev) { … } static void mma8452_trigger_cleanup(struct iio_dev *indio_dev) { … } static int mma8452_reset(struct i2c_client *client) { … } static const struct of_device_id mma8452_dt_ids[] = …; MODULE_DEVICE_TABLE(of, mma8452_dt_ids); static int mma8452_probe(struct i2c_client *client) { … } static void mma8452_remove(struct i2c_client *client) { … } #ifdef CONFIG_PM static int mma8452_runtime_suspend(struct device *dev) { … } static int mma8452_runtime_resume(struct device *dev) { … } #endif static const struct dev_pm_ops mma8452_pm_ops = …; static const struct i2c_device_id mma8452_id[] = …; MODULE_DEVICE_TABLE(i2c, mma8452_id); static struct i2c_driver mma8452_driver = …; module_i2c_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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