// SPDX-License-Identifier: GPL-2.0-only /* * Copyright 2016 Broadcom */ #include <linux/module.h> #include <linux/mod_devicetable.h> #include <linux/io.h> #include <linux/clk.h> #include <linux/mfd/syscon.h> #include <linux/regmap.h> #include <linux/delay.h> #include <linux/interrupt.h> #include <linux/platform_device.h> #include <linux/iio/iio.h> /* Below Register's are common to IPROC ADC and Touchscreen IP */ #define IPROC_REGCTL1 … #define IPROC_REGCTL2 … #define IPROC_INTERRUPT_THRES … #define IPROC_INTERRUPT_MASK … #define IPROC_INTERRUPT_STATUS … #define IPROC_ANALOG_CONTROL … #define IPROC_CONTROLLER_STATUS … #define IPROC_AUX_DATA … #define IPROC_SOFT_BYPASS_CONTROL … #define IPROC_SOFT_BYPASS_DATA … /* IPROC ADC Channel register offsets */ #define IPROC_ADC_CHANNEL_REGCTL1 … #define IPROC_ADC_CHANNEL_REGCTL2 … #define IPROC_ADC_CHANNEL_STATUS … #define IPROC_ADC_CHANNEL_INTERRUPT_STATUS … #define IPROC_ADC_CHANNEL_INTERRUPT_MASK … #define IPROC_ADC_CHANNEL_DATA … #define IPROC_ADC_CHANNEL_OFFSET … /* Bit definitions for IPROC_REGCTL2 */ #define IPROC_ADC_AUXIN_SCAN_ENA … #define IPROC_ADC_PWR_LDO … #define IPROC_ADC_PWR_ADC … #define IPROC_ADC_PWR_BG … #define IPROC_ADC_CONTROLLER_EN … /* Bit definitions for IPROC_INTERRUPT_MASK and IPROC_INTERRUPT_STATUS */ #define IPROC_ADC_AUXDATA_RDY_INTR … #define IPROC_ADC_INTR … #define IPROC_ADC_INTR_MASK … /* Bit definitions for IPROC_ANALOG_CONTROL */ #define IPROC_ADC_CHANNEL_SEL … #define IPROC_ADC_CHANNEL_SEL_MASK … /* Bit definitions for IPROC_ADC_CHANNEL_REGCTL1 */ #define IPROC_ADC_CHANNEL_ROUNDS … #define IPROC_ADC_CHANNEL_ROUNDS_MASK … #define IPROC_ADC_CHANNEL_MODE … #define IPROC_ADC_CHANNEL_MODE_MASK … #define IPROC_ADC_CHANNEL_MODE_TDM … #define IPROC_ADC_CHANNEL_MODE_SNAPSHOT … #define IPROC_ADC_CHANNEL_ENABLE … #define IPROC_ADC_CHANNEL_ENABLE_MASK … /* Bit definitions for IPROC_ADC_CHANNEL_REGCTL2 */ #define IPROC_ADC_CHANNEL_WATERMARK … #define IPROC_ADC_CHANNEL_WATERMARK_MASK … #define IPROC_ADC_WATER_MARK_LEVEL … /* Bit definitions for IPROC_ADC_CHANNEL_STATUS */ #define IPROC_ADC_CHANNEL_DATA_LOST … #define IPROC_ADC_CHANNEL_DATA_LOST_MASK … #define IPROC_ADC_CHANNEL_VALID_ENTERIES … #define IPROC_ADC_CHANNEL_VALID_ENTERIES_MASK … #define IPROC_ADC_CHANNEL_TOTAL_ENTERIES … #define IPROC_ADC_CHANNEL_TOTAL_ENTERIES_MASK … /* Bit definitions for IPROC_ADC_CHANNEL_INTERRUPT_MASK */ #define IPROC_ADC_CHANNEL_WTRMRK_INTR … #define IPROC_ADC_CHANNEL_WTRMRK_INTR_MASK … #define IPROC_ADC_CHANNEL_FULL_INTR … #define IPROC_ADC_CHANNEL_FULL_INTR_MASK … #define IPROC_ADC_CHANNEL_EMPTY_INTR … #define IPROC_ADC_CHANNEL_EMPTY_INTR_MASK … #define IPROC_ADC_WATER_MARK_INTR_ENABLE … /* Number of time to retry a set of the interrupt mask reg */ #define IPROC_ADC_INTMASK_RETRY_ATTEMPTS … #define IPROC_ADC_READ_TIMEOUT … #define iproc_adc_dbg_reg(dev, priv, reg) … struct iproc_adc_priv { … }; static void iproc_adc_reg_dump(struct iio_dev *indio_dev) { … } static irqreturn_t iproc_adc_interrupt_thread(int irq, void *data) { … } static irqreturn_t iproc_adc_interrupt_handler(int irq, void *data) { … } static int iproc_adc_do_read(struct iio_dev *indio_dev, int channel, u16 *p_adc_data) { … } static int iproc_adc_enable(struct iio_dev *indio_dev) { … } static void iproc_adc_disable(struct iio_dev *indio_dev) { … } static int iproc_adc_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) { … } static const struct iio_info iproc_adc_iio_info = …; #define IPROC_ADC_CHANNEL(_index, _id) … static const struct iio_chan_spec iproc_adc_iio_channels[] = …; static int iproc_adc_probe(struct platform_device *pdev) { … } static void iproc_adc_remove(struct platform_device *pdev) { … } static const struct of_device_id iproc_adc_of_match[] = …; MODULE_DEVICE_TABLE(of, iproc_adc_of_match); static struct platform_driver iproc_adc_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …;
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