/* SPDX-License-Identifier: MIT */ /****************************************************************************** * xen.h * * Guest OS interface to Xen. * * Copyright (c) 2004, K A Fraser */ #ifndef __XEN_PUBLIC_XEN_H__ #define __XEN_PUBLIC_XEN_H__ #include <asm/xen/interface.h> /* * XEN "SYSTEM CALLS" (a.k.a. HYPERCALLS). */ /* * x86_32: EAX = vector; EBX, ECX, EDX, ESI, EDI = args 1, 2, 3, 4, 5. * EAX = return value * (argument registers may be clobbered on return) * x86_64: RAX = vector; RDI, RSI, RDX, R10, R8, R9 = args 1, 2, 3, 4, 5, 6. * RAX = return value * (argument registers not clobbered on return; RCX, R11 are) */ #define __HYPERVISOR_set_trap_table … #define __HYPERVISOR_mmu_update … #define __HYPERVISOR_set_gdt … #define __HYPERVISOR_stack_switch … #define __HYPERVISOR_set_callbacks … #define __HYPERVISOR_fpu_taskswitch … #define __HYPERVISOR_sched_op_compat … #define __HYPERVISOR_platform_op … #define __HYPERVISOR_set_debugreg … #define __HYPERVISOR_get_debugreg … #define __HYPERVISOR_update_descriptor … #define __HYPERVISOR_memory_op … #define __HYPERVISOR_multicall … #define __HYPERVISOR_update_va_mapping … #define __HYPERVISOR_set_timer_op … #define __HYPERVISOR_event_channel_op_compat … #define __HYPERVISOR_xen_version … #define __HYPERVISOR_console_io … #define __HYPERVISOR_physdev_op_compat … #define __HYPERVISOR_grant_table_op … #define __HYPERVISOR_vm_assist … #define __HYPERVISOR_update_va_mapping_otherdomain … #define __HYPERVISOR_iret … #define __HYPERVISOR_vcpu_op … #define __HYPERVISOR_set_segment_base … #define __HYPERVISOR_mmuext_op … #define __HYPERVISOR_xsm_op … #define __HYPERVISOR_nmi_op … #define __HYPERVISOR_sched_op … #define __HYPERVISOR_callback_op … #define __HYPERVISOR_xenoprof_op … #define __HYPERVISOR_event_channel_op … #define __HYPERVISOR_physdev_op … #define __HYPERVISOR_hvm_op … #define __HYPERVISOR_sysctl … #define __HYPERVISOR_domctl … #define __HYPERVISOR_kexec_op … #define __HYPERVISOR_tmem_op … #define __HYPERVISOR_xc_reserved_op … #define __HYPERVISOR_xenpmu_op … #define __HYPERVISOR_dm_op … /* Architecture-specific hypercall definitions. */ #define __HYPERVISOR_arch_0 … #define __HYPERVISOR_arch_1 … #define __HYPERVISOR_arch_2 … #define __HYPERVISOR_arch_3 … #define __HYPERVISOR_arch_4 … #define __HYPERVISOR_arch_5 … #define __HYPERVISOR_arch_6 … #define __HYPERVISOR_arch_7 … /* * VIRTUAL INTERRUPTS * * Virtual interrupts that a guest OS may receive from Xen. * In the side comments, 'V.' denotes a per-VCPU VIRQ while 'G.' denotes a * global VIRQ. The former can be bound once per VCPU and cannot be re-bound. * The latter can be allocated only once per guest: they must initially be * allocated to VCPU0 but can subsequently be re-bound. */ #define VIRQ_TIMER … #define VIRQ_DEBUG … #define VIRQ_CONSOLE … #define VIRQ_DOM_EXC … #define VIRQ_TBUF … #define VIRQ_DEBUGGER … #define VIRQ_XENOPROF … #define VIRQ_CON_RING … #define VIRQ_PCPU_STATE … #define VIRQ_MEM_EVENT … #define VIRQ_XC_RESERVED … #define VIRQ_ENOMEM … #define VIRQ_XENPMU … /* Architecture-specific VIRQ definitions. */ #define VIRQ_ARCH_0 … #define VIRQ_ARCH_1 … #define VIRQ_ARCH_2 … #define VIRQ_ARCH_3 … #define VIRQ_ARCH_4 … #define VIRQ_ARCH_5 … #define VIRQ_ARCH_6 … #define VIRQ_ARCH_7 … #define NR_VIRQS … /* * enum neg_errnoval HYPERVISOR_mmu_update(const struct mmu_update reqs[], * unsigned count, unsigned *done_out, * unsigned foreigndom) * @reqs is an array of mmu_update_t structures ((ptr, val) pairs). * @count is the length of the above array. * @pdone is an output parameter indicating number of completed operations * @foreigndom[15:0]: FD, the expected owner of data pages referenced in this * hypercall invocation. Can be DOMID_SELF. * @foreigndom[31:16]: PFD, the expected owner of pagetable pages referenced * in this hypercall invocation. The value of this field * (x) encodes the PFD as follows: * x == 0 => PFD == DOMID_SELF * x != 0 => PFD == x - 1 * * Sub-commands: ptr[1:0] specifies the appropriate MMU_* command. * ------------- * ptr[1:0] == MMU_NORMAL_PT_UPDATE: * Updates an entry in a page table belonging to PFD. If updating an L1 table, * and the new table entry is valid/present, the mapped frame must belong to * FD. If attempting to map an I/O page then the caller assumes the privilege * of the FD. * FD == DOMID_IO: Permit /only/ I/O mappings, at the priv level of the caller. * FD == DOMID_XEN: Map restricted areas of Xen's heap space. * ptr[:2] -- Machine address of the page-table entry to modify. * val -- Value to write. * * There also certain implicit requirements when using this hypercall. The * pages that make up a pagetable must be mapped read-only in the guest. * This prevents uncontrolled guest updates to the pagetable. Xen strictly * enforces this, and will disallow any pagetable update which will end up * mapping pagetable page RW, and will disallow using any writable page as a * pagetable. In practice it means that when constructing a page table for a * process, thread, etc, we MUST be very dilligient in following these rules: * 1). Start with top-level page (PGD or in Xen language: L4). Fill out * the entries. * 2). Keep on going, filling out the upper (PUD or L3), and middle (PMD * or L2). * 3). Start filling out the PTE table (L1) with the PTE entries. Once * done, make sure to set each of those entries to RO (so writeable bit * is unset). Once that has been completed, set the PMD (L2) for this * PTE table as RO. * 4). When completed with all of the PMD (L2) entries, and all of them have * been set to RO, make sure to set RO the PUD (L3). Do the same * operation on PGD (L4) pagetable entries that have a PUD (L3) entry. * 5). Now before you can use those pages (so setting the cr3), you MUST also * pin them so that the hypervisor can verify the entries. This is done * via the HYPERVISOR_mmuext_op(MMUEXT_PIN_L4_TABLE, guest physical frame * number of the PGD (L4)). And this point the HYPERVISOR_mmuext_op( * MMUEXT_NEW_BASEPTR, guest physical frame number of the PGD (L4)) can be * issued. * For 32-bit guests, the L4 is not used (as there is less pagetables), so * instead use L3. * At this point the pagetables can be modified using the MMU_NORMAL_PT_UPDATE * hypercall. Also if so desired the OS can also try to write to the PTE * and be trapped by the hypervisor (as the PTE entry is RO). * * To deallocate the pages, the operations are the reverse of the steps * mentioned above. The argument is MMUEXT_UNPIN_TABLE for all levels and the * pagetable MUST not be in use (meaning that the cr3 is not set to it). * * ptr[1:0] == MMU_MACHPHYS_UPDATE: * Updates an entry in the machine->pseudo-physical mapping table. * ptr[:2] -- Machine address within the frame whose mapping to modify. * The frame must belong to the FD, if one is specified. * val -- Value to write into the mapping entry. * * ptr[1:0] == MMU_PT_UPDATE_PRESERVE_AD: * As MMU_NORMAL_PT_UPDATE above, but A/D bits currently in the PTE are ORed * with those in @val. * * @val is usually the machine frame number along with some attributes. * The attributes by default follow the architecture defined bits. Meaning that * if this is a X86_64 machine and four page table layout is used, the layout * of val is: * - 63 if set means No execute (NX) * - 46-13 the machine frame number * - 12 available for guest * - 11 available for guest * - 10 available for guest * - 9 available for guest * - 8 global * - 7 PAT (PSE is disabled, must use hypercall to make 4MB or 2MB pages) * - 6 dirty * - 5 accessed * - 4 page cached disabled * - 3 page write through * - 2 userspace accessible * - 1 writeable * - 0 present * * The one bits that does not fit with the default layout is the PAGE_PSE * also called PAGE_PAT). The MMUEXT_[UN]MARK_SUPER arguments to the * HYPERVISOR_mmuext_op serve as mechanism to set a pagetable to be 4MB * (or 2MB) instead of using the PAGE_PSE bit. * * The reason that the PAGE_PSE (bit 7) is not being utilized is due to Xen * using it as the Page Attribute Table (PAT) bit - for details on it please * refer to Intel SDM 10.12. The PAT allows to set the caching attributes of * pages instead of using MTRRs. * * The PAT MSR is as follows (it is a 64-bit value, each entry is 8 bits): * PAT4 PAT0 * +-----+-----+----+----+----+-----+----+----+ * | UC | UC- | WC | WB | UC | UC- | WC | WB | <= Linux * +-----+-----+----+----+----+-----+----+----+ * | UC | UC- | WT | WB | UC | UC- | WT | WB | <= BIOS (default when machine boots) * +-----+-----+----+----+----+-----+----+----+ * | rsv | rsv | WP | WC | UC | UC- | WT | WB | <= Xen * +-----+-----+----+----+----+-----+----+----+ * * The lookup of this index table translates to looking up * Bit 7, Bit 4, and Bit 3 of val entry: * * PAT/PSE (bit 7) ... PCD (bit 4) .. PWT (bit 3). * * If all bits are off, then we are using PAT0. If bit 3 turned on, * then we are using PAT1, if bit 3 and bit 4, then PAT2.. * * As you can see, the Linux PAT1 translates to PAT4 under Xen. Which means * that if a guest that follows Linux's PAT setup and would like to set Write * Combined on pages it MUST use PAT4 entry. Meaning that Bit 7 (PAGE_PAT) is * set. For example, under Linux it only uses PAT0, PAT1, and PAT2 for the * caching as: * * WB = none (so PAT0) * WC = PWT (bit 3 on) * UC = PWT | PCD (bit 3 and 4 are on). * * To make it work with Xen, it needs to translate the WC bit as so: * * PWT (so bit 3 on) --> PAT (so bit 7 is on) and clear bit 3 * * And to translate back it would: * * PAT (bit 7 on) --> PWT (bit 3 on) and clear bit 7. */ #define MMU_NORMAL_PT_UPDATE … #define MMU_MACHPHYS_UPDATE … #define MMU_PT_UPDATE_PRESERVE_AD … #define MMU_PT_UPDATE_NO_TRANSLATE … /* * MMU EXTENDED OPERATIONS * * enum neg_errnoval HYPERVISOR_mmuext_op(mmuext_op_t uops[], * unsigned int count, * unsigned int *pdone, * unsigned int foreigndom) */ /* HYPERVISOR_mmuext_op() accepts a list of mmuext_op structures. * A foreigndom (FD) can be specified (or DOMID_SELF for none). * Where the FD has some effect, it is described below. * * cmd: MMUEXT_(UN)PIN_*_TABLE * mfn: Machine frame number to be (un)pinned as a p.t. page. * The frame must belong to the FD, if one is specified. * * cmd: MMUEXT_NEW_BASEPTR * mfn: Machine frame number of new page-table base to install in MMU. * * cmd: MMUEXT_NEW_USER_BASEPTR [x86/64 only] * mfn: Machine frame number of new page-table base to install in MMU * when in user space. * * cmd: MMUEXT_TLB_FLUSH_LOCAL * No additional arguments. Flushes local TLB. * * cmd: MMUEXT_INVLPG_LOCAL * linear_addr: Linear address to be flushed from the local TLB. * * cmd: MMUEXT_TLB_FLUSH_MULTI * vcpumask: Pointer to bitmap of VCPUs to be flushed. * * cmd: MMUEXT_INVLPG_MULTI * linear_addr: Linear address to be flushed. * vcpumask: Pointer to bitmap of VCPUs to be flushed. * * cmd: MMUEXT_TLB_FLUSH_ALL * No additional arguments. Flushes all VCPUs' TLBs. * * cmd: MMUEXT_INVLPG_ALL * linear_addr: Linear address to be flushed from all VCPUs' TLBs. * * cmd: MMUEXT_FLUSH_CACHE * No additional arguments. Writes back and flushes cache contents. * * cmd: MMUEXT_FLUSH_CACHE_GLOBAL * No additional arguments. Writes back and flushes cache contents * on all CPUs in the system. * * cmd: MMUEXT_SET_LDT * linear_addr: Linear address of LDT base (NB. must be page-aligned). * nr_ents: Number of entries in LDT. * * cmd: MMUEXT_CLEAR_PAGE * mfn: Machine frame number to be cleared. * * cmd: MMUEXT_COPY_PAGE * mfn: Machine frame number of the destination page. * src_mfn: Machine frame number of the source page. * * cmd: MMUEXT_[UN]MARK_SUPER * mfn: Machine frame number of head of superpage to be [un]marked. */ #define MMUEXT_PIN_L1_TABLE … #define MMUEXT_PIN_L2_TABLE … #define MMUEXT_PIN_L3_TABLE … #define MMUEXT_PIN_L4_TABLE … #define MMUEXT_UNPIN_TABLE … #define MMUEXT_NEW_BASEPTR … #define MMUEXT_TLB_FLUSH_LOCAL … #define MMUEXT_INVLPG_LOCAL … #define MMUEXT_TLB_FLUSH_MULTI … #define MMUEXT_INVLPG_MULTI … #define MMUEXT_TLB_FLUSH_ALL … #define MMUEXT_INVLPG_ALL … #define MMUEXT_FLUSH_CACHE … #define MMUEXT_SET_LDT … #define MMUEXT_NEW_USER_BASEPTR … #define MMUEXT_CLEAR_PAGE … #define MMUEXT_COPY_PAGE … #define MMUEXT_FLUSH_CACHE_GLOBAL … #define MMUEXT_MARK_SUPER … #define MMUEXT_UNMARK_SUPER … #ifndef __ASSEMBLY__ struct mmuext_op { … }; DEFINE_GUEST_HANDLE_STRUCT(…); #endif /* These are passed as 'flags' to update_va_mapping. They can be ORed. */ /* When specifying UVMF_MULTI, also OR in a pointer to a CPU bitmap. */ /* UVMF_LOCAL is merely UVMF_MULTI with a NULL bitmap pointer. */ #define UVMF_NONE … #define UVMF_TLB_FLUSH … #define UVMF_INVLPG … #define UVMF_FLUSHTYPE_MASK … #define UVMF_MULTI … #define UVMF_LOCAL … #define UVMF_ALL … /* * Commands to HYPERVISOR_console_io(). */ #define CONSOLEIO_write … #define CONSOLEIO_read … /* * Commands to HYPERVISOR_vm_assist(). */ #define VMASST_CMD_enable … #define VMASST_CMD_disable … /* x86/32 guests: simulate full 4GB segment limits. */ #define VMASST_TYPE_4gb_segments … /* x86/32 guests: trap (vector 15) whenever above vmassist is used. */ #define VMASST_TYPE_4gb_segments_notify … /* * x86 guests: support writes to bottom-level PTEs. * NB1. Page-directory entries cannot be written. * NB2. Guest must continue to remove all writable mappings of PTEs. */ #define VMASST_TYPE_writable_pagetables … /* x86/PAE guests: support PDPTs above 4GB. */ #define VMASST_TYPE_pae_extended_cr3 … /* * x86 guests: Sane behaviour for virtual iopl * - virtual iopl updated from do_iret() hypercalls. * - virtual iopl reported in bounce frames. * - guest kernels assumed to be level 0 for the purpose of iopl checks. */ #define VMASST_TYPE_architectural_iopl … /* * All guests: activate update indicator in vcpu_runstate_info * Enable setting the XEN_RUNSTATE_UPDATE flag in guest memory mapped * vcpu_runstate_info during updates of the runstate information. */ #define VMASST_TYPE_runstate_update_flag … #define MAX_VMASST_TYPE … #ifndef __ASSEMBLY__ domid_t; /* Domain ids >= DOMID_FIRST_RESERVED cannot be used for ordinary domains. */ #define DOMID_FIRST_RESERVED … /* DOMID_SELF is used in certain contexts to refer to oneself. */ #define DOMID_SELF … /* * DOMID_IO is used to restrict page-table updates to mapping I/O memory. * Although no Foreign Domain need be specified to map I/O pages, DOMID_IO * is useful to ensure that no mappings to the OS's own heap are accidentally * installed. (e.g., in Linux this could cause havoc as reference counts * aren't adjusted on the I/O-mapping code path). * This only makes sense in MMUEXT_SET_FOREIGNDOM, but in that context can * be specified by any calling domain. */ #define DOMID_IO … /* * DOMID_XEN is used to allow privileged domains to map restricted parts of * Xen's heap space (e.g., the machine_to_phys table). * This only makes sense in MMUEXT_SET_FOREIGNDOM, and is only permitted if * the caller is privileged. */ #define DOMID_XEN … /* DOMID_COW is used as the owner of sharable pages */ #define DOMID_COW … /* DOMID_INVALID is used to identify pages with unknown owner. */ #define DOMID_INVALID … /* Idle domain. */ #define DOMID_IDLE … /* * Send an array of these to HYPERVISOR_mmu_update(). * NB. The fields are natural pointer/address size for this architecture. */ struct mmu_update { … }; DEFINE_GUEST_HANDLE_STRUCT(…); /* * Send an array of these to HYPERVISOR_multicall(). * NB. The fields are logically the natural register size for this * architecture. In cases where xen_ulong_t is larger than this then * any unused bits in the upper portion must be zero. */ struct multicall_entry { … }; DEFINE_GUEST_HANDLE_STRUCT(…); struct vcpu_time_info { … }; /* 32 bytes */ struct vcpu_info { … }; /* 64 bytes (x86) */ /* * Xen/kernel shared data -- pointer provided in start_info. * NB. We expect that this struct is smaller than a page. */ struct shared_info { … }; /* * Start-of-day memory layout * * 1. The domain is started within contiguous virtual-memory region. * 2. The contiguous region begins and ends on an aligned 4MB boundary. * 3. This the order of bootstrap elements in the initial virtual region: * a. relocated kernel image * b. initial ram disk [mod_start, mod_len] * (may be omitted) * c. list of allocated page frames [mfn_list, nr_pages] * (unless relocated due to XEN_ELFNOTE_INIT_P2M) * d. start_info_t structure [register ESI (x86)] * in case of dom0 this page contains the console info, too * e. unless dom0: xenstore ring page * f. unless dom0: console ring page * g. bootstrap page tables [pt_base, CR3 (x86)] * h. bootstrap stack [register ESP (x86)] * 4. Bootstrap elements are packed together, but each is 4kB-aligned. * 5. The list of page frames forms a contiguous 'pseudo-physical' memory * layout for the domain. In particular, the bootstrap virtual-memory * region is a 1:1 mapping to the first section of the pseudo-physical map. * 6. All bootstrap elements are mapped read-writable for the guest OS. The * only exception is the bootstrap page table, which is mapped read-only. * 7. There is guaranteed to be at least 512kB padding after the final * bootstrap element. If necessary, the bootstrap virtual region is * extended by an extra 4MB to ensure this. */ #define MAX_GUEST_CMDLINE … struct start_info { … }; /* These flags are passed in the 'flags' field of start_info_t. */ #define SIF_PRIVILEGED … #define SIF_INITDOMAIN … #define SIF_MULTIBOOT_MOD … #define SIF_MOD_START_PFN … #define SIF_VIRT_P2M_4TOOLS … /* P->M making the 3 level tree obsolete? */ #define SIF_PM_MASK … /* * A multiboot module is a package containing modules very similar to a * multiboot module array. The only differences are: * - the array of module descriptors is by convention simply at the beginning * of the multiboot module, * - addresses in the module descriptors are based on the beginning of the * multiboot module, * - the number of modules is determined by a termination descriptor that has * mod_start == 0. * * This permits to both build it statically and reference it in a configuration * file, and let the PV guest easily rebase the addresses to virtual addresses * and at the same time count the number of modules. */ struct xen_multiboot_mod_list { … }; /* * The console structure in start_info.console.dom0 * * This structure includes a variety of information required to * have a working VGA/VESA console. */ struct dom0_vga_console_info { … }; cpumap_t; xen_domain_handle_t; /* Turn a plain number into a C unsigned long constant. */ #define __mk_unsigned_long(x) … #define mk_unsigned_long(x) … #define TMEM_SPEC_VERSION … struct tmem_op { … }; DEFINE_GUEST_HANDLE(…); #else /* __ASSEMBLY__ */ /* In assembly code we cannot use C numeric constant suffixes. */ #define mk_unsigned_long … #endif /* !__ASSEMBLY__ */ #endif /* __XEN_PUBLIC_XEN_H__ */
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