linux/drivers/iio/adc/max11410.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * MAX11410 SPI ADC driver
 *
 * Copyright 2022 Analog Devices Inc.
 */
#include <linux/bitfield.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#include <linux/spi/spi.h>

#include <linux/unaligned.h>

#include <linux/iio/buffer.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/trigger.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>

#define MAX11410_REG_CONV_START
#define MAX11410_CONV_TYPE_SINGLE
#define MAX11410_CONV_TYPE_CONTINUOUS
#define MAX11410_REG_CAL_START
#define MAX11410_CAL_START_SELF
#define MAX11410_CAL_START_PGA
#define MAX11410_REG_GPIO_CTRL(ch)
#define MAX11410_GPIO_INTRB
#define MAX11410_REG_FILTER
#define MAX11410_FILTER_RATE_MASK
#define MAX11410_FILTER_RATE_MAX
#define MAX11410_FILTER_LINEF_MASK
#define MAX11410_FILTER_50HZ
#define MAX11410_FILTER_60HZ
#define MAX11410_REG_CTRL
#define MAX11410_CTRL_REFSEL_MASK
#define MAX11410_CTRL_VREFN_BUF_BIT
#define MAX11410_CTRL_VREFP_BUF_BIT
#define MAX11410_CTRL_FORMAT_BIT
#define MAX11410_CTRL_UNIPOLAR_BIT
#define MAX11410_REG_MUX_CTRL0
#define MAX11410_REG_PGA
#define MAX11410_PGA_GAIN_MASK
#define MAX11410_PGA_SIG_PATH_MASK
#define MAX11410_PGA_SIG_PATH_BUFFERED
#define MAX11410_PGA_SIG_PATH_BYPASS
#define MAX11410_PGA_SIG_PATH_PGA
#define MAX11410_REG_DATA0
#define MAX11410_REG_STATUS
#define MAX11410_STATUS_CONV_READY_BIT
#define MAX11410_STATUS_CAL_READY_BIT

#define MAX11410_REFSEL_AVDD_AGND
#define MAX11410_REFSEL_MAX
#define MAX11410_SIG_PATH_MAX
#define MAX11410_CHANNEL_INDEX_MAX
#define MAX11410_AINP_AVDD
#define MAX11410_AINN_GND

#define MAX11410_CONVERSION_TIMEOUT_MS
#define MAX11410_CALIB_TIMEOUT_MS

#define MAX11410_SCALE_AVAIL_SIZE

enum max11410_filter {};

static const u8 max11410_sampling_len[] =;

static const int max11410_sampling_rates[4][10][2] =;

struct max11410_channel_config {};

struct max11410_state {};

static const struct iio_chan_spec chanspec_template =;

static unsigned int max11410_reg_size(unsigned int reg)
{}

static int max11410_write_reg(struct max11410_state *st, unsigned int reg,
			      unsigned int val)
{}

static int max11410_read_reg(struct max11410_state *st, unsigned int reg,
			     int *val)
{}

static struct regulator *max11410_get_vrefp(struct max11410_state *st,
					    u8 refsel)
{}

static struct regulator *max11410_get_vrefn(struct max11410_state *st,
					    u8 refsel)
{}

static const struct regmap_config regmap_config =;

static ssize_t max11410_notch_en_show(struct device *dev,
				      struct device_attribute *devattr,
				      char *buf)
{}

static ssize_t max11410_notch_en_store(struct device *dev,
				       struct device_attribute *devattr,
				       const char *buf, size_t count)
{}

static ssize_t in_voltage_filter2_notch_center_show(struct device *dev,
						    struct device_attribute *devattr,
						    char *buf)
{}

static IIO_CONST_ATTR(in_voltage_filter0_notch_center, "50");
static IIO_CONST_ATTR(in_voltage_filter1_notch_center, "60");
static IIO_DEVICE_ATTR_RO(in_voltage_filter2_notch_center, 2);

static IIO_DEVICE_ATTR(in_voltage_filter0_notch_en, 0644,
		       max11410_notch_en_show, max11410_notch_en_store, 0);
static IIO_DEVICE_ATTR(in_voltage_filter1_notch_en, 0644,
		       max11410_notch_en_show, max11410_notch_en_store, 1);
static IIO_DEVICE_ATTR(in_voltage_filter2_notch_en, 0644,
		       max11410_notch_en_show, max11410_notch_en_store, 2);

static struct attribute *max11410_attributes[] =;

static const struct attribute_group max11410_attribute_group =;

static int max11410_set_input_mux(struct max11410_state *st, u8 ainp, u8 ainn)
{}

static int max11410_configure_channel(struct max11410_state *st,
				      struct iio_chan_spec const *chan)
{}

static int max11410_sample(struct max11410_state *st, int *sample_raw,
			   struct iio_chan_spec const *chan)
{}

static int max11410_get_scale(struct max11410_state *state,
			      struct max11410_channel_config cfg)
{}

static int max11410_read_raw(struct iio_dev *indio_dev,
			     struct iio_chan_spec const *chan,
			     int *val, int *val2, long info)
{}

static int max11410_write_raw(struct iio_dev *indio_dev,
			      struct iio_chan_spec const *chan,
			      int val, int val2, long mask)
{}

static int max11410_read_avail(struct iio_dev *indio_dev,
			       struct iio_chan_spec const *chan,
			       const int **vals, int *type, int *length,
			       long info)
{}

static const struct iio_info max11410_info =;

static irqreturn_t max11410_trigger_handler(int irq, void *p)
{}

static int max11410_buffer_postenable(struct iio_dev *indio_dev)
{}

static int max11410_buffer_predisable(struct iio_dev *indio_dev)
{}

static const struct iio_buffer_setup_ops max11410_buffer_ops =;

static const struct iio_trigger_ops max11410_trigger_ops =;

static irqreturn_t max11410_interrupt(int irq, void *dev_id)
{
	struct iio_dev *indio_dev = dev_id;
	struct max11410_state *st = iio_priv(indio_dev);

	if (iio_buffer_enabled(indio_dev))
		iio_trigger_poll_nested(st->trig);
	else
		complete(&st->completion);

	return IRQ_HANDLED;
};

static int max11410_parse_channels(struct max11410_state *st,
				   struct iio_dev *indio_dev)
{}

static void max11410_disable_reg(void *reg)
{}

static int max11410_init_vref(struct device *dev,
			      struct regulator **vref,
			      const char *id)
{}

static int max11410_calibrate(struct max11410_state *st, u32 cal_type)
{}

static int max11410_self_calibrate(struct max11410_state *st)
{}

static int max11410_probe(struct spi_device *spi)
{}

static const struct of_device_id max11410_spi_of_id[] =;
MODULE_DEVICE_TABLE(of, max11410_spi_of_id);

static const struct spi_device_id max11410_id[] =;
MODULE_DEVICE_TABLE(spi, max11410_id);

static struct spi_driver max11410_driver =;
module_spi_driver();

MODULE_AUTHOR();
MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();