linux/drivers/iio/adc/mcp3911.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Driver for Microchip MCP3911, Two-channel Analog Front End
 *
 * Copyright (C) 2018 Marcus Folkesson <[email protected]>
 * Copyright (C) 2018 Kent Gustavsson <[email protected]>
 */
#include <linux/bitfield.h>
#include <linux/bits.h>
#include <linux/cleanup.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/property.h>
#include <linux/regulator/consumer.h>
#include <linux/spi/spi.h>

#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/triggered_buffer.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/trigger.h>

#include <linux/unaligned.h>

#define MCP3911_REG_CHANNEL0
#define MCP3911_REG_CHANNEL1
#define MCP3911_REG_MOD
#define MCP3911_REG_PHASE
#define MCP3911_REG_GAIN
#define MCP3911_GAIN_MASK(ch)
#define MCP3911_GAIN_VAL(ch, val)

#define MCP3911_REG_STATUSCOM
#define MCP3911_STATUSCOM_DRHIZ
#define MCP3911_STATUSCOM_READ
#define MCP3911_STATUSCOM_CH1_24WIDTH
#define MCP3911_STATUSCOM_CH0_24WIDTH
#define MCP3911_STATUSCOM_EN_OFFCAL
#define MCP3911_STATUSCOM_EN_GAINCAL

#define MCP3911_REG_CONFIG
#define MCP3911_CONFIG_CLKEXT
#define MCP3911_CONFIG_VREFEXT
#define MCP3911_CONFIG_OSR

#define MCP3911_REG_OFFCAL_CH0
#define MCP3911_REG_GAINCAL_CH0
#define MCP3911_REG_OFFCAL_CH1
#define MCP3911_REG_GAINCAL_CH1
#define MCP3911_REG_VREFCAL

#define MCP3911_CHANNEL(ch)
#define MCP3911_OFFCAL(ch)

/* Internal voltage reference in mV */
#define MCP3911_INT_VREF_MV

#define MCP3911_REG_READ(reg, id)
#define MCP3911_REG_WRITE(reg, id)
#define MCP3911_REG_MASK

#define MCP3911_NUM_SCALES

/* Registers compatible with MCP3910 */
#define MCP3910_REG_STATUSCOM
#define MCP3910_STATUSCOM_READ
#define MCP3910_STATUSCOM_DRHIZ

#define MCP3910_REG_GAIN

#define MCP3910_REG_CONFIG0
#define MCP3910_CONFIG0_EN_OFFCAL
#define MCP3910_CONFIG0_OSR

#define MCP3910_REG_CONFIG1
#define MCP3910_CONFIG1_CLKEXT
#define MCP3910_CONFIG1_VREFEXT

#define MCP3910_REG_OFFCAL_CH0
#define MCP3910_OFFCAL(ch)

/* Maximal number of channels used by the MCP39XX family */
#define MCP39XX_MAX_NUM_CHANNELS

static const int mcp3911_osr_table[] =;
static u32 mcp3911_scale_table[MCP3911_NUM_SCALES][2];

enum mcp3911_id {};

struct mcp3911;
struct mcp3911_chip_info {};

struct mcp3911 {};

static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len)
{}

static int mcp3911_write(struct mcp3911 *adc, u8 reg, u32 val, u8 len)
{}

static int mcp3911_update(struct mcp3911 *adc, u8 reg, u32 mask, u32 val, u8 len)
{}

static int mcp3910_enable_offset(struct mcp3911 *adc, bool enable)
{}

static int mcp3910_get_offset(struct mcp3911 *adc, int channel, int *val)
{}

static int mcp3910_set_offset(struct mcp3911 *adc, int channel, int val)
{}

static int mcp3911_enable_offset(struct mcp3911 *adc, bool enable)
{}

static int mcp3911_get_offset(struct mcp3911 *adc, int channel, int *val)
{}

static int mcp3911_set_offset(struct mcp3911 *adc, int channel, int val)
{}

static int mcp3910_get_osr(struct mcp3911 *adc, u32 *val)
{}

static int mcp3910_set_osr(struct mcp3911 *adc, u32 val)
{}

static int mcp3911_set_osr(struct mcp3911 *adc, u32 val)
{}

static int mcp3911_get_osr(struct mcp3911 *adc, u32 *val)
{}

static int mcp3910_set_scale(struct mcp3911 *adc, int channel, u32 val)
{}

static int mcp3911_set_scale(struct mcp3911 *adc, int channel, u32 val)
{}

static int mcp3911_write_raw_get_fmt(struct iio_dev *indio_dev,
				     struct iio_chan_spec const *chan,
				     long mask)
{}

static int mcp3911_read_avail(struct iio_dev *indio_dev,
			      struct iio_chan_spec const *chan,
			      const int **vals, int *type, int *length,
			      long info)
{}

static int mcp3911_read_raw(struct iio_dev *indio_dev,
			    struct iio_chan_spec const *channel, int *val,
			    int *val2, long mask)
{}

static int mcp3911_write_raw(struct iio_dev *indio_dev,
			     struct iio_chan_spec const *channel, int val,
			     int val2, long mask)
{}

static int mcp3911_calc_scale_table(u32 vref_mv)
{}

#define MCP3911_CHAN(idx)

static const struct iio_chan_spec mcp3910_channels[] =;

static const struct iio_chan_spec mcp3911_channels[] =;

static const struct iio_chan_spec mcp3912_channels[] =;

static const struct iio_chan_spec mcp3913_channels[] =;

static const struct iio_chan_spec mcp3914_channels[] =;

static const struct iio_chan_spec mcp3918_channels[] =;

static const struct iio_chan_spec mcp3919_channels[] =;

static irqreturn_t mcp3911_trigger_handler(int irq, void *p)
{}

static const struct iio_info mcp3911_info =;

static int mcp3911_config(struct mcp3911 *adc, bool external_vref)
{}

static int mcp3910_config(struct mcp3911 *adc, bool external_vref)
{}

static int mcp3911_set_trigger_state(struct iio_trigger *trig, bool enable)
{}

static const struct iio_trigger_ops mcp3911_trigger_ops =;

static int mcp3911_probe(struct spi_device *spi)
{}

static const struct mcp3911_chip_info mcp3911_chip_info[] =;
static const struct of_device_id mcp3911_dt_ids[] =;
MODULE_DEVICE_TABLE(of, mcp3911_dt_ids);

static const struct spi_device_id mcp3911_id[] =;
MODULE_DEVICE_TABLE(spi, mcp3911_id);

static struct spi_driver mcp3911_driver =;
module_spi_driver();

MODULE_AUTHOR();
MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();