// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. */ #include <linux/bitops.h> #include <linux/completion.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/iio/iio.h> #include <linux/interrupt.h> #include <linux/kernel.h> #include <linux/mutex.h> #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/slab.h> /* IADC register and bit definition */ #define IADC_REVISION2 … #define IADC_REVISION2_SUPPORTED_IADC … #define IADC_PERPH_TYPE … #define IADC_PERPH_TYPE_ADC … #define IADC_PERPH_SUBTYPE … #define IADC_PERPH_SUBTYPE_IADC … #define IADC_STATUS1 … #define IADC_STATUS1_OP_MODE … #define IADC_STATUS1_REQ_STS … #define IADC_STATUS1_EOC … #define IADC_STATUS1_REQ_STS_EOC_MASK … #define IADC_MODE_CTL … #define IADC_OP_MODE_SHIFT … #define IADC_OP_MODE_NORMAL … #define IADC_TRIM_EN … #define IADC_EN_CTL1 … #define IADC_EN_CTL1_SET … #define IADC_CH_SEL_CTL … #define IADC_DIG_PARAM … #define IADC_DIG_DEC_RATIO_SEL_SHIFT … #define IADC_HW_SETTLE_DELAY … #define IADC_CONV_REQ … #define IADC_CONV_REQ_SET … #define IADC_FAST_AVG_CTL … #define IADC_FAST_AVG_EN … #define IADC_FAST_AVG_EN_SET … #define IADC_PERH_RESET_CTL3 … #define IADC_FOLLOW_WARM_RB … #define IADC_DATA … #define IADC_SEC_ACCESS … #define IADC_SEC_ACCESS_DATA … #define IADC_NOMINAL_RSENSE … #define IADC_NOMINAL_RSENSE_SIGN_MASK … #define IADC_REF_GAIN_MICRO_VOLTS … #define IADC_INT_RSENSE_DEVIATION … #define IADC_INT_RSENSE_IDEAL_VALUE … #define IADC_INT_RSENSE_DEFAULT_VALUE … #define IADC_INT_RSENSE_DEFAULT_GF … #define IADC_INT_RSENSE_DEFAULT_SMIC … #define IADC_CONV_TIME_MIN_US … #define IADC_CONV_TIME_MAX_US … #define IADC_DEF_PRESCALING … #define IADC_DEF_DECIMATION … #define IADC_DEF_HW_SETTLE_TIME … #define IADC_DEF_AVG_SAMPLES … /* IADC channel list */ #define IADC_INT_RSENSE … #define IADC_EXT_RSENSE … #define IADC_GAIN_17P857MV … #define IADC_EXT_OFFSET_CSP_CSN … #define IADC_INT_OFFSET_CSP2_CSN2 … /** * struct iadc_chip - IADC Current ADC device structure. * @regmap: regmap for register read/write. * @dev: This device pointer. * @base: base offset for the ADC peripheral. * @rsense: Values of the internal and external sense resister in micro Ohms. * @poll_eoc: Poll for end of conversion instead of waiting for IRQ. * @offset: Raw offset values for the internal and external channels. * @gain: Raw gain of the channels. * @lock: ADC lock for access to the peripheral. * @complete: ADC notification after end of conversion interrupt is received. */ struct iadc_chip { … }; static int iadc_read(struct iadc_chip *iadc, u16 offset, u8 *data) { … } static int iadc_write(struct iadc_chip *iadc, u16 offset, u8 data) { … } static int iadc_reset(struct iadc_chip *iadc) { … } static int iadc_set_state(struct iadc_chip *iadc, bool state) { … } static void iadc_status_show(struct iadc_chip *iadc) { … } static int iadc_configure(struct iadc_chip *iadc, int channel) { … } static int iadc_poll_wait_eoc(struct iadc_chip *iadc, unsigned int interval_us) { … } static int iadc_read_result(struct iadc_chip *iadc, u16 *data) { … } static int iadc_do_conversion(struct iadc_chip *iadc, int chan, u16 *data) { … } static int iadc_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) { … } static const struct iio_info iadc_info = …; static irqreturn_t iadc_isr(int irq, void *dev_id) { … } static int iadc_update_offset(struct iadc_chip *iadc) { … } static int iadc_version_check(struct iadc_chip *iadc) { … } static int iadc_rsense_read(struct iadc_chip *iadc, struct device_node *node) { … } static const struct iio_chan_spec iadc_channels[] = …; static int iadc_probe(struct platform_device *pdev) { … } static const struct of_device_id iadc_match_table[] = …; MODULE_DEVICE_TABLE(of, iadc_match_table); static struct platform_driver iadc_driver = …; module_platform_driver(…) …; MODULE_ALIAS(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …; MODULE_AUTHOR(…) …;
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