#include <linux/bitops.h>
#include <linux/completion.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/iio/adc/qcom-vadc-common.h>
#include <linux/iio/iio.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/log2.h>
#include <linux/math64.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <dt-bindings/iio/qcom,spmi-vadc.h>
#define ADC5_USR_REVISION1 …
#define ADC5_USR_STATUS1 …
#define ADC5_USR_STATUS1_CONV_FAULT …
#define ADC5_USR_STATUS1_REQ_STS …
#define ADC5_USR_STATUS1_EOC …
#define ADC5_USR_STATUS1_REQ_STS_EOC_MASK …
#define ADC5_USR_STATUS2 …
#define ADC5_USR_STATUS2_CONV_SEQ_MASK …
#define ADC5_USR_STATUS2_CONV_SEQ_MASK_SHIFT …
#define ADC5_USR_IBAT_MEAS …
#define ADC5_USR_IBAT_MEAS_SUPPORTED …
#define ADC5_USR_DIG_PARAM …
#define ADC5_USR_DIG_PARAM_CAL_VAL …
#define ADC5_USR_DIG_PARAM_CAL_VAL_SHIFT …
#define ADC5_USR_DIG_PARAM_CAL_SEL …
#define ADC5_USR_DIG_PARAM_CAL_SEL_SHIFT …
#define ADC5_USR_DIG_PARAM_DEC_RATIO_SEL …
#define ADC5_USR_DIG_PARAM_DEC_RATIO_SEL_SHIFT …
#define ADC5_USR_FAST_AVG_CTL …
#define ADC5_USR_FAST_AVG_CTL_EN …
#define ADC5_USR_FAST_AVG_CTL_SAMPLES_MASK …
#define ADC5_USR_CH_SEL_CTL …
#define ADC5_USR_DELAY_CTL …
#define ADC5_USR_HW_SETTLE_DELAY_MASK …
#define ADC5_USR_EN_CTL1 …
#define ADC5_USR_EN_CTL1_ADC_EN …
#define ADC5_USR_CONV_REQ …
#define ADC5_USR_CONV_REQ_REQ …
#define ADC5_USR_DATA0 …
#define ADC5_USR_DATA1 …
#define ADC5_USR_IBAT_DATA0 …
#define ADC5_USR_IBAT_DATA1 …
#define ADC_CHANNEL_OFFSET …
#define ADC_CHANNEL_MASK …
#define ADC5_CONV_TIME_MIN_US …
#define ADC5_CONV_TIME_MAX_US …
#define ADC5_CONV_TIME_RETRY …
#define ADC5_CONV_TIMEOUT …
#define ADC5_HW_SETTLE_DIFF_MINOR …
#define ADC5_HW_SETTLE_DIFF_MAJOR …
#define ADC_APP_SID …
#define ADC_APP_SID_MASK …
#define ADC7_CONV_TIMEOUT …
enum adc5_cal_method { … };
enum adc5_cal_val { … };
struct adc5_channel_prop { … };
struct adc5_chip { … };
static int adc5_read(struct adc5_chip *adc, u16 offset, u8 *data, int len)
{ … }
static int adc5_write(struct adc5_chip *adc, u16 offset, u8 *data, int len)
{ … }
static int adc5_masked_write(struct adc5_chip *adc, u16 offset, u8 mask, u8 val)
{ … }
static int adc5_read_voltage_data(struct adc5_chip *adc, u16 *data)
{ … }
static int adc5_poll_wait_eoc(struct adc5_chip *adc)
{ … }
static void adc5_update_dig_param(struct adc5_chip *adc,
struct adc5_channel_prop *prop, u8 *data)
{ … }
static int adc5_configure(struct adc5_chip *adc,
struct adc5_channel_prop *prop)
{ … }
static int adc7_configure(struct adc5_chip *adc,
struct adc5_channel_prop *prop)
{ … }
static int adc5_do_conversion(struct adc5_chip *adc,
struct adc5_channel_prop *prop,
struct iio_chan_spec const *chan,
u16 *data_volt, u16 *data_cur)
{ … }
static int adc7_do_conversion(struct adc5_chip *adc,
struct adc5_channel_prop *prop,
struct iio_chan_spec const *chan,
u16 *data_volt, u16 *data_cur)
{ … }
adc_do_conversion;
static irqreturn_t adc5_isr(int irq, void *dev_id)
{ … }
static int adc5_fwnode_xlate(struct iio_dev *indio_dev,
const struct fwnode_reference_args *iiospec)
{ … }
static int adc7_fwnode_xlate(struct iio_dev *indio_dev,
const struct fwnode_reference_args *iiospec)
{ … }
static int adc_read_raw_common(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val, int *val2,
long mask, adc_do_conversion do_conv)
{ … }
static int adc5_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val, int *val2,
long mask)
{ … }
static int adc7_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val, int *val2,
long mask)
{ … }
static const struct iio_info adc5_info = …;
static const struct iio_info adc7_info = …;
struct adc5_channels { … };
#define ADC5_CHAN(_dname, _type, _mask, _pre, _scale) … \
#define ADC5_CHAN_TEMP(_dname, _pre, _scale) … \
#define ADC5_CHAN_VOLT(_dname, _pre, _scale) … \
static const struct adc5_channels adc5_chans_pmic[ADC5_MAX_CHANNEL] = …;
static const struct adc5_channels adc7_chans_pmic[ADC5_MAX_CHANNEL] = …;
static const struct adc5_channels adc5_chans_rev2[ADC5_MAX_CHANNEL] = …;
static int adc5_get_fw_channel_data(struct adc5_chip *adc,
struct adc5_channel_prop *prop,
struct fwnode_handle *fwnode,
const struct adc5_data *data)
{ … }
static const struct adc5_data adc5_data_pmic = …;
static const struct adc5_data adc7_data_pmic = …;
static const struct adc5_data adc5_data_pmic_rev2 = …;
static const struct of_device_id adc5_match_table[] = …;
MODULE_DEVICE_TABLE(of, adc5_match_table);
static int adc5_get_fw_data(struct adc5_chip *adc)
{ … }
static int adc5_probe(struct platform_device *pdev)
{ … }
static struct platform_driver adc5_driver = …;
module_platform_driver(…) …;
MODULE_ALIAS(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;