// SPDX-License-Identifier: GPL-2.0-only /* * MPU3050 gyroscope driver * * Copyright (C) 2016 Linaro Ltd. * Author: Linus Walleij <[email protected]> * * Based on the input subsystem driver, Copyright (C) 2011 Wistron Co.Ltd * Joseph Lai <[email protected]> and trimmed down by * Alan Cox <[email protected]> in turn based on bma023.c. * Device behaviour based on a misc driver posted by Nathan Royer in 2011. * * TODO: add support for setting up the low pass 3dB frequency. */ #include <linux/bitfield.h> #include <linux/bitops.h> #include <linux/delay.h> #include <linux/err.h> #include <linux/iio/buffer.h> #include <linux/iio/iio.h> #include <linux/iio/sysfs.h> #include <linux/iio/trigger.h> #include <linux/iio/trigger_consumer.h> #include <linux/iio/triggered_buffer.h> #include <linux/interrupt.h> #include <linux/module.h> #include <linux/pm_runtime.h> #include <linux/property.h> #include <linux/random.h> #include <linux/slab.h> #include "mpu3050.h" #define MPU3050_CHIP_ID … #define MPU3050_CHIP_ID_MASK … /* * Register map: anything suffixed *_H is a big-endian high byte and always * followed by the corresponding low byte (*_L) even though these are not * explicitly included in the register definitions. */ #define MPU3050_CHIP_ID_REG … #define MPU3050_PRODUCT_ID_REG … #define MPU3050_XG_OFFS_TC … #define MPU3050_YG_OFFS_TC … #define MPU3050_ZG_OFFS_TC … #define MPU3050_X_OFFS_USR_H … #define MPU3050_Y_OFFS_USR_H … #define MPU3050_Z_OFFS_USR_H … #define MPU3050_FIFO_EN … #define MPU3050_AUX_VDDIO … #define MPU3050_SLV_ADDR … #define MPU3050_SMPLRT_DIV … #define MPU3050_DLPF_FS_SYNC … #define MPU3050_INT_CFG … #define MPU3050_AUX_ADDR … #define MPU3050_INT_STATUS … #define MPU3050_TEMP_H … #define MPU3050_XOUT_H … #define MPU3050_YOUT_H … #define MPU3050_ZOUT_H … #define MPU3050_DMP_CFG1 … #define MPU3050_DMP_CFG2 … #define MPU3050_BANK_SEL … #define MPU3050_MEM_START_ADDR … #define MPU3050_MEM_R_W … #define MPU3050_FIFO_COUNT_H … #define MPU3050_FIFO_R … #define MPU3050_USR_CTRL … #define MPU3050_PWR_MGM … /* MPU memory bank read options */ #define MPU3050_MEM_PRFTCH … #define MPU3050_MEM_USER_BANK … /* Bits 8-11 select memory bank */ #define MPU3050_MEM_RAM_BANK_0 … #define MPU3050_MEM_RAM_BANK_1 … #define MPU3050_MEM_RAM_BANK_2 … #define MPU3050_MEM_RAM_BANK_3 … #define MPU3050_MEM_OTP_BANK_0 … #define MPU3050_AXIS_REGS(axis) … /* Register bits */ /* FIFO Enable */ #define MPU3050_FIFO_EN_FOOTER … #define MPU3050_FIFO_EN_AUX_ZOUT … #define MPU3050_FIFO_EN_AUX_YOUT … #define MPU3050_FIFO_EN_AUX_XOUT … #define MPU3050_FIFO_EN_GYRO_ZOUT … #define MPU3050_FIFO_EN_GYRO_YOUT … #define MPU3050_FIFO_EN_GYRO_XOUT … #define MPU3050_FIFO_EN_TEMP_OUT … /* * Digital Low Pass filter (DLPF) * Full Scale (FS) * and Synchronization */ #define MPU3050_EXT_SYNC_NONE … #define MPU3050_EXT_SYNC_TEMP … #define MPU3050_EXT_SYNC_GYROX … #define MPU3050_EXT_SYNC_GYROY … #define MPU3050_EXT_SYNC_GYROZ … #define MPU3050_EXT_SYNC_ACCELX … #define MPU3050_EXT_SYNC_ACCELY … #define MPU3050_EXT_SYNC_ACCELZ … #define MPU3050_EXT_SYNC_MASK … #define MPU3050_EXT_SYNC_SHIFT … #define MPU3050_FS_250DPS … #define MPU3050_FS_500DPS … #define MPU3050_FS_1000DPS … #define MPU3050_FS_2000DPS … #define MPU3050_FS_MASK … #define MPU3050_FS_SHIFT … #define MPU3050_DLPF_CFG_256HZ_NOLPF2 … #define MPU3050_DLPF_CFG_188HZ … #define MPU3050_DLPF_CFG_98HZ … #define MPU3050_DLPF_CFG_42HZ … #define MPU3050_DLPF_CFG_20HZ … #define MPU3050_DLPF_CFG_10HZ … #define MPU3050_DLPF_CFG_5HZ … #define MPU3050_DLPF_CFG_2100HZ_NOLPF … #define MPU3050_DLPF_CFG_MASK … #define MPU3050_DLPF_CFG_SHIFT … /* Interrupt config */ #define MPU3050_INT_RAW_RDY_EN … #define MPU3050_INT_DMP_DONE_EN … #define MPU3050_INT_MPU_RDY_EN … #define MPU3050_INT_ANYRD_2CLEAR … #define MPU3050_INT_LATCH_EN … #define MPU3050_INT_OPEN … #define MPU3050_INT_ACTL … /* Interrupt status */ #define MPU3050_INT_STATUS_RAW_RDY … #define MPU3050_INT_STATUS_DMP_DONE … #define MPU3050_INT_STATUS_MPU_RDY … #define MPU3050_INT_STATUS_FIFO_OVFLW … /* USR_CTRL */ #define MPU3050_USR_CTRL_FIFO_EN … #define MPU3050_USR_CTRL_AUX_IF_EN … #define MPU3050_USR_CTRL_AUX_IF_RST … #define MPU3050_USR_CTRL_FIFO_RST … #define MPU3050_USR_CTRL_GYRO_RST … /* PWR_MGM */ #define MPU3050_PWR_MGM_PLL_X … #define MPU3050_PWR_MGM_PLL_Y … #define MPU3050_PWR_MGM_PLL_Z … #define MPU3050_PWR_MGM_CLKSEL_MASK … #define MPU3050_PWR_MGM_STBY_ZG … #define MPU3050_PWR_MGM_STBY_YG … #define MPU3050_PWR_MGM_STBY_XG … #define MPU3050_PWR_MGM_SLEEP … #define MPU3050_PWR_MGM_RESET … #define MPU3050_PWR_MGM_MASK … /* * Fullscale precision is (for finest precision) +/- 250 deg/s, so the full * scale is actually 500 deg/s. All 16 bits are then used to cover this scale, * in two's complement. */ static unsigned int mpu3050_fs_precision[] = …; /* * Regulator names */ static const char mpu3050_reg_vdd[] = …; static const char mpu3050_reg_vlogic[] = …; static unsigned int mpu3050_get_freq(struct mpu3050 *mpu3050) { … } static int mpu3050_start_sampling(struct mpu3050 *mpu3050) { … } static int mpu3050_set_8khz_samplerate(struct mpu3050 *mpu3050) { … } static int mpu3050_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) { … } static int mpu3050_write_raw(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, int val, int val2, long mask) { … } static irqreturn_t mpu3050_trigger_handler(int irq, void *p) { … } static int mpu3050_buffer_preenable(struct iio_dev *indio_dev) { … } static int mpu3050_buffer_postdisable(struct iio_dev *indio_dev) { … } static const struct iio_buffer_setup_ops mpu3050_buffer_setup_ops = …; static const struct iio_mount_matrix * mpu3050_get_mount_matrix(const struct iio_dev *indio_dev, const struct iio_chan_spec *chan) { … } static const struct iio_chan_spec_ext_info mpu3050_ext_info[] = …; #define MPU3050_AXIS_CHANNEL(axis, index) … static const struct iio_chan_spec mpu3050_channels[] = …; /* Four channels apart from timestamp, scan mask = 0x0f */ static const unsigned long mpu3050_scan_masks[] = …; /* * These are just the hardcoded factors resulting from the more elaborate * calculations done with fractions in the scale raw get/set functions. */ static IIO_CONST_ATTR(anglevel_scale_available, "0.000122070 " "0.000274658 " "0.000518798 " "0.001068115"); static struct attribute *mpu3050_attributes[] = …; static const struct attribute_group mpu3050_attribute_group = …; static const struct iio_info mpu3050_info = …; /** * mpu3050_read_mem() - read MPU-3050 internal memory * @mpu3050: device to read from * @bank: target bank * @addr: target address * @len: number of bytes * @buf: the buffer to store the read bytes in */ static int mpu3050_read_mem(struct mpu3050 *mpu3050, u8 bank, u8 addr, u8 len, u8 *buf) { … } static int mpu3050_hw_init(struct mpu3050 *mpu3050) { … } static int mpu3050_power_up(struct mpu3050 *mpu3050) { … } static int mpu3050_power_down(struct mpu3050 *mpu3050) { … } static irqreturn_t mpu3050_irq_handler(int irq, void *p) { … } static irqreturn_t mpu3050_irq_thread(int irq, void *p) { … } /** * mpu3050_drdy_trigger_set_state() - set data ready interrupt state * @trig: trigger instance * @enable: true if trigger should be enabled, false to disable */ static int mpu3050_drdy_trigger_set_state(struct iio_trigger *trig, bool enable) { … } static const struct iio_trigger_ops mpu3050_trigger_ops = …; static int mpu3050_trigger_probe(struct iio_dev *indio_dev, int irq) { … } int mpu3050_common_probe(struct device *dev, struct regmap *map, int irq, const char *name) { … } void mpu3050_common_remove(struct device *dev) { … } static int mpu3050_runtime_suspend(struct device *dev) { … } static int mpu3050_runtime_resume(struct device *dev) { … } DEFINE_RUNTIME_DEV_PM_OPS(mpu3050_dev_pm_ops, mpu3050_runtime_suspend, mpu3050_runtime_resume, NULL); MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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