linux/drivers/perf/amlogic/meson_g12_ddr_pmu.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2022 Amlogic, Inc. All rights reserved.
 */

#include <linux/err.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/perf_event.h>
#include <linux/platform_device.h>
#include <linux/printk.h>
#include <linux/types.h>

#include <soc/amlogic/meson_ddr_pmu.h>

#define PORT_MAJOR …
#define DEFAULT_XTAL_FREQ …

#define DMC_QOS_IRQ …

/* DMC bandwidth monitor register address offset */
#define DMC_MON_G12_CTRL0 …
#define DMC_MON_G12_CTRL1 …
#define DMC_MON_G12_CTRL2 …
#define DMC_MON_G12_CTRL3 …
#define DMC_MON_G12_CTRL4 …
#define DMC_MON_G12_CTRL5 …
#define DMC_MON_G12_CTRL6 …
#define DMC_MON_G12_CTRL7 …
#define DMC_MON_G12_CTRL8 …

#define DMC_MON_G12_ALL_REQ_CNT …
#define DMC_MON_G12_ALL_GRANT_CNT …
#define DMC_MON_G12_ONE_GRANT_CNT …
#define DMC_MON_G12_SEC_GRANT_CNT …
#define DMC_MON_G12_THD_GRANT_CNT …
#define DMC_MON_G12_FOR_GRANT_CNT …
#define DMC_MON_G12_TIMER …

/* Each bit represent a axi line */
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);

PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);

/* for sm1 and g12b */
PMU_FORMAT_ATTR(…);

/* for g12b only */
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);
PMU_FORMAT_ATTR(…);

static struct attribute *g12_pmu_format_attrs[] = …;

/* calculate ddr clock */
static unsigned long dmc_g12_get_freq_quick(struct dmc_info *info)
{ … }

#ifdef DEBUG
static void g12_dump_reg(struct dmc_info *db)
{
	int s = 0, i;
	unsigned int r;

	for (i = 0; i < 9; i++) {
		r  = readl(db->ddr_reg[0] + (DMC_MON_G12_CTRL0 + (i << 2)));
		pr_notice("DMC_MON_CTRL%d:        %08x\n", i, r);
	}
	r  = readl(db->ddr_reg[0] + DMC_MON_G12_ALL_REQ_CNT);
	pr_notice("DMC_MON_ALL_REQ_CNT:  %08x\n", r);
	r  = readl(db->ddr_reg[0] + DMC_MON_G12_ALL_GRANT_CNT);
	pr_notice("DMC_MON_ALL_GRANT_CNT:%08x\n", r);
	r  = readl(db->ddr_reg[0] + DMC_MON_G12_ONE_GRANT_CNT);
	pr_notice("DMC_MON_ONE_GRANT_CNT:%08x\n", r);
	r  = readl(db->ddr_reg[0] + DMC_MON_G12_SEC_GRANT_CNT);
	pr_notice("DMC_MON_SEC_GRANT_CNT:%08x\n", r);
	r  = readl(db->ddr_reg[0] + DMC_MON_G12_THD_GRANT_CNT);
	pr_notice("DMC_MON_THD_GRANT_CNT:%08x\n", r);
	r  = readl(db->ddr_reg[0] + DMC_MON_G12_FOR_GRANT_CNT);
	pr_notice("DMC_MON_FOR_GRANT_CNT:%08x\n", r);
	r  = readl(db->ddr_reg[0] + DMC_MON_G12_TIMER);
	pr_notice("DMC_MON_TIMER:        %08x\n", r);
}
#endif

static void dmc_g12_counter_enable(struct dmc_info *info)
{ … }

static void dmc_g12_config_fiter(struct dmc_info *info,
				 int port, int channel)
{ … }

static void dmc_g12_set_axi_filter(struct dmc_info *info, int axi_id, int channel)
{ … }

static void dmc_g12_counter_disable(struct dmc_info *info)
{ … }

static void dmc_g12_get_counters(struct dmc_info *info,
				 struct dmc_counter *counter)
{ … }

static int dmc_g12_irq_handler(struct dmc_info *info,
			       struct dmc_counter *counter)
{ … }

static const struct dmc_hw_info g12a_dmc_info = …;

static const struct dmc_hw_info g12b_dmc_info = …;

static const struct dmc_hw_info sm1_dmc_info = …;

static int g12_ddr_pmu_probe(struct platform_device *pdev)
{ … }

static void g12_ddr_pmu_remove(struct platform_device *pdev)
{ … }

static const struct of_device_id meson_ddr_pmu_dt_match[] = …;
MODULE_DEVICE_TABLE(of, meson_ddr_pmu_dt_match);

static struct platform_driver g12_ddr_pmu_driver = …;

module_platform_driver(…) …;
MODULE_AUTHOR(…) …;
MODULE_LICENSE(…) …;
MODULE_DESCRIPTION(…) …;