linux/drivers/accel/qaic/mhi_controller.c

// SPDX-License-Identifier: GPL-2.0-only

/* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved. */
/* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. */

#include <linux/delay.h>
#include <linux/err.h>
#include <linux/memblock.h>
#include <linux/mhi.h>
#include <linux/moduleparam.h>
#include <linux/pci.h>
#include <linux/sizes.h>

#include "mhi_controller.h"
#include "qaic.h"

#define MAX_RESET_TIME_SEC …

static unsigned int mhi_timeout_ms = …; /* 2 sec default */
module_param(mhi_timeout_ms, uint, 0600);
MODULE_PARM_DESC(…) …;

static const struct mhi_channel_config aic100_channels[] = …;

static struct mhi_event_config aic100_events[] = …;

static struct mhi_controller_config aic100_config = …;

static int mhi_read_reg(struct mhi_controller *mhi_cntrl, void __iomem *addr, u32 *out)
{ … }

static void mhi_write_reg(struct mhi_controller *mhi_cntrl, void __iomem *addr, u32 val)
{ … }

static int mhi_runtime_get(struct mhi_controller *mhi_cntrl)
{ … }

static void mhi_runtime_put(struct mhi_controller *mhi_cntrl)
{ … }

static void mhi_status_cb(struct mhi_controller *mhi_cntrl, enum mhi_callback reason)
{ … }

static int mhi_reset_and_async_power_up(struct mhi_controller *mhi_cntrl)
{ … }

struct mhi_controller *qaic_mhi_register_controller(struct pci_dev *pci_dev, void __iomem *mhi_bar,
						    int mhi_irq, bool shared_msi)
{ … }

void qaic_mhi_free_controller(struct mhi_controller *mhi_cntrl, bool link_up)
{ … }

void qaic_mhi_start_reset(struct mhi_controller *mhi_cntrl)
{ … }

void qaic_mhi_reset_done(struct mhi_controller *mhi_cntrl)
{ … }