#ifndef GAUDI_REG_MAP_H_
#define GAUDI_REG_MAP_H_
#define mmHW_STATE …
#define mmGIC_HOST_PI_UPD_IRQ_POLL_REG …
#define mmGIC_TPC_QM_IRQ_CTRL_POLL_REG …
#define mmGIC_MME_QM_IRQ_CTRL_POLL_REG …
#define mmGIC_DMA_QM_IRQ_CTRL_POLL_REG …
#define mmGIC_NIC_QM_IRQ_CTRL_POLL_REG …
#define mmGIC_DMA_CR_IRQ_CTRL_POLL_REG …
#define mmGIC_HOST_HALT_IRQ_POLL_REG …
#define mmGIC_HOST_INTS_IRQ_POLL_REG …
#define mmCPU_BOOT_DEV_STS0 …
#define mmCPU_BOOT_DEV_STS1 …
#define mmFUSE_VER_OFFSET …
#define mmCPU_CMD_STATUS_TO_HOST …
#define mmCPU_BOOT_ERR0 …
#define mmCPU_BOOT_ERR1 …
#define mmUPD_STS …
#define mmUPD_CMD …
#define mmPREBOOT_VER_OFFSET …
#define mmUBOOT_VER_OFFSET …
#define mmRDWR_TEST …
#define mmBTL_ID …
#define mmPREBOOT_PCIE_EN …
#define mmCOLD_RST_DATA …
#define mmUPD_PENDING_STS …
#endif