/* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef __SOUND_ICE1712_H #define __SOUND_ICE1712_H /* * ALSA driver for ICEnsemble ICE1712 (Envy24) * * Copyright (c) 2000 Jaroslav Kysela <[email protected]> */ #include <linux/io.h> #include <sound/control.h> #include <sound/ac97_codec.h> #include <sound/rawmidi.h> #include <sound/i2c.h> #include <sound/ak4xxx-adda.h> #include <sound/ak4114.h> #include <sound/pt2258.h> #include <sound/pcm.h> #include <sound/mpu401.h> /* * Direct registers */ #define ICEREG(ice, x) … #define ICE1712_REG_CONTROL … #define ICE1712_RESET … #define ICE1712_SERR_ASSERT_DS_DMA … #define ICE1712_DOS_VOL … #define ICE1712_SERR_LEVEL … #define ICE1712_SERR_ASSERT_SB … #define ICE1712_NATIVE … #define ICE1712_REG_IRQMASK … #define ICE1712_IRQ_MPU1 … #define ICE1712_IRQ_TIMER … #define ICE1712_IRQ_MPU2 … #define ICE1712_IRQ_PROPCM … #define ICE1712_IRQ_FM … #define ICE1712_IRQ_PBKDS … #define ICE1712_IRQ_CONCAP … #define ICE1712_IRQ_CONPBK … #define ICE1712_REG_IRQSTAT … /* look to ICE1712_IRQ_* */ #define ICE1712_REG_INDEX … #define ICE1712_REG_DATA … #define ICE1712_REG_NMI_STAT1 … #define ICE1712_REG_NMI_DATA … #define ICE1712_REG_NMI_INDEX … #define ICE1712_REG_AC97_INDEX … #define ICE1712_REG_AC97_CMD … #define ICE1712_AC97_COLD … #define ICE1712_AC97_WARM … #define ICE1712_AC97_WRITE … #define ICE1712_AC97_READ … #define ICE1712_AC97_READY … #define ICE1712_AC97_PBK_VSR … #define ICE1712_AC97_CAP_VSR … #define ICE1712_REG_AC97_DATA … #define ICE1712_REG_MPU1_CTRL … #define ICE1712_REG_MPU1_DATA … #define ICE1712_REG_I2C_DEV_ADDR … #define ICE1712_I2C_WRITE … #define ICE1712_REG_I2C_BYTE_ADDR … #define ICE1712_REG_I2C_DATA … #define ICE1712_REG_I2C_CTRL … #define ICE1712_I2C_EEPROM … #define ICE1712_I2C_BUSY … #define ICE1712_REG_CONCAP_ADDR … #define ICE1712_REG_CONCAP_COUNT … #define ICE1712_REG_SERR_SHADOW … #define ICE1712_REG_MPU2_CTRL … #define ICE1712_REG_MPU2_DATA … #define ICE1712_REG_TIMER … /* * Indirect registers */ #define ICE1712_IREG_PBK_COUNT_LO … #define ICE1712_IREG_PBK_COUNT_HI … #define ICE1712_IREG_PBK_CTRL … #define ICE1712_IREG_PBK_LEFT … #define ICE1712_IREG_PBK_RIGHT … #define ICE1712_IREG_PBK_SOFT … #define ICE1712_IREG_PBK_RATE_LO … #define ICE1712_IREG_PBK_RATE_MID … #define ICE1712_IREG_PBK_RATE_HI … #define ICE1712_IREG_CAP_COUNT_LO … #define ICE1712_IREG_CAP_COUNT_HI … #define ICE1712_IREG_CAP_CTRL … #define ICE1712_IREG_GPIO_DATA … #define ICE1712_IREG_GPIO_WRITE_MASK … #define ICE1712_IREG_GPIO_DIRECTION … #define ICE1712_IREG_CONSUMER_POWERDOWN … #define ICE1712_IREG_PRO_POWERDOWN … /* * Consumer section direct DMA registers */ #define ICEDS(ice, x) … #define ICE1712_DS_INTMASK … #define ICE1712_DS_INTSTAT … #define ICE1712_DS_DATA … #define ICE1712_DS_INDEX … /* * Consumer section channel registers */ #define ICE1712_DSC_ADDR0 … #define ICE1712_DSC_COUNT0 … #define ICE1712_DSC_ADDR1 … #define ICE1712_DSC_COUNT1 … #define ICE1712_DSC_CONTROL … #define ICE1712_BUFFER1 … #define ICE1712_BUFFER1_AUTO … #define ICE1712_BUFFER0_AUTO … #define ICE1712_FLUSH … #define ICE1712_STEREO … #define ICE1712_16BIT … #define ICE1712_PAUSE … #define ICE1712_START … #define ICE1712_DSC_RATE … #define ICE1712_DSC_VOLUME … /* * Professional multi-track direct control registers */ #define ICEMT(ice, x) … #define ICE1712_MT_IRQ … #define ICE1712_MULTI_CAPTURE … #define ICE1712_MULTI_PLAYBACK … #define ICE1712_MULTI_CAPSTATUS … #define ICE1712_MULTI_PBKSTATUS … #define ICE1712_MT_RATE … #define ICE1712_SPDIF_MASTER … #define ICE1712_MT_I2S_FORMAT … #define ICE1712_MT_AC97_INDEX … #define ICE1712_MT_AC97_CMD … /* look to ICE1712_AC97_* */ #define ICE1712_MT_AC97_DATA … #define ICE1712_MT_PLAYBACK_ADDR … #define ICE1712_MT_PLAYBACK_SIZE … #define ICE1712_MT_PLAYBACK_COUNT … #define ICE1712_MT_PLAYBACK_CONTROL … #define ICE1712_CAPTURE_START_SHADOW … #define ICE1712_PLAYBACK_PAUSE … #define ICE1712_PLAYBACK_START … #define ICE1712_MT_CAPTURE_ADDR … #define ICE1712_MT_CAPTURE_SIZE … #define ICE1712_MT_CAPTURE_COUNT … #define ICE1712_MT_CAPTURE_CONTROL … #define ICE1712_CAPTURE_START … #define ICE1712_MT_ROUTE_PSDOUT03 … #define ICE1712_MT_ROUTE_SPDOUT … #define ICE1712_MT_ROUTE_CAPTURE … #define ICE1712_MT_MONITOR_VOLUME … #define ICE1712_MT_MONITOR_INDEX … #define ICE1712_MT_MONITOR_RATE … #define ICE1712_MT_MONITOR_ROUTECTRL … #define ICE1712_ROUTE_AC97 … #define ICE1712_MT_MONITOR_PEAKINDEX … #define ICE1712_MT_MONITOR_PEAKDATA … /* * Codec configuration bits */ /* PCI[60] System Configuration */ #define ICE1712_CFG_CLOCK … #define ICE1712_CFG_CLOCK512 … #define ICE1712_CFG_CLOCK384 … #define ICE1712_CFG_EXT … #define ICE1712_CFG_2xMPU401 … #define ICE1712_CFG_NO_CON_AC97 … #define ICE1712_CFG_ADC_MASK … #define ICE1712_CFG_DAC_MASK … /* PCI[61] AC-Link Configuration */ #define ICE1712_CFG_PRO_I2S … #define ICE1712_CFG_AC97_PACKED … /* PCI[62] I2S Features */ #define ICE1712_CFG_I2S_VOLUME … #define ICE1712_CFG_I2S_96KHZ … #define ICE1712_CFG_I2S_RESMASK … #define ICE1712_CFG_I2S_OTHER … /* PCI[63] S/PDIF Configuration */ #define ICE1712_CFG_I2S_CHIPID … #define ICE1712_CFG_SPDIF_IN … #define ICE1712_CFG_SPDIF_OUT … /* * DMA mode values * identical with DMA_XXX on i386 architecture. */ #define ICE1712_DMA_MODE_WRITE … #define ICE1712_DMA_AUTOINIT … /* * I2C EEPROM Address */ #define ICE_I2C_EEPROM_ADDR … struct snd_ice1712; struct snd_ice1712_eeprom { … }; enum { … }; #define ice_has_con_ac97(ice) … struct snd_ak4xxx_private { … }; struct snd_ice1712_spdif { … }; struct snd_ice1712_card_info; struct snd_ice1712 { … }; /* * gpio access functions */ static inline void snd_ice1712_gpio_set_dir(struct snd_ice1712 *ice, unsigned int bits) { … } static inline unsigned int snd_ice1712_gpio_get_dir(struct snd_ice1712 *ice) { … } static inline void snd_ice1712_gpio_set_mask(struct snd_ice1712 *ice, unsigned int bits) { … } static inline void snd_ice1712_gpio_write(struct snd_ice1712 *ice, unsigned int val) { … } static inline unsigned int snd_ice1712_gpio_read(struct snd_ice1712 *ice) { … } /* * save and restore gpio status * The access to gpio will be protected by mutex, so don't forget to * restore! */ static inline void snd_ice1712_save_gpio_status(struct snd_ice1712 *ice) { … } static inline void snd_ice1712_restore_gpio_status(struct snd_ice1712 *ice) { … } /* for bit controls */ #define ICE1712_GPIO(xiface, xname, xindex, mask, invert, xaccess) … int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); /* * set gpio direction, write mask and data */ static inline void snd_ice1712_gpio_write_bits(struct snd_ice1712 *ice, unsigned int mask, unsigned int bits) { … } static inline int snd_ice1712_gpio_read_bits(struct snd_ice1712 *ice, unsigned int mask) { … } /* route access functions */ int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift); int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift); int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice); int snd_ice1712_akm4xxx_init(struct snd_akm4xxx *ak, const struct snd_akm4xxx *template, const struct snd_ak4xxx_private *priv, struct snd_ice1712 *ice); void snd_ice1712_akm4xxx_free(struct snd_ice1712 *ice); int snd_ice1712_akm4xxx_build_controls(struct snd_ice1712 *ice); int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr); static inline void snd_ice1712_write(struct snd_ice1712 *ice, u8 addr, u8 data) { … } static inline u8 snd_ice1712_read(struct snd_ice1712 *ice, u8 addr) { … } /* * entry pointer */ struct snd_ice1712_card_info { … }; #endif /* __SOUND_ICE1712_H */
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