/* SPDX-License-Identifier: GPL-2.0-only */ /* * max98095.h -- MAX98095 ALSA SoC Audio driver * * Copyright 2011 Maxim Integrated Products */ #ifndef _MAX98095_H #define _MAX98095_H /* * MAX98095 Registers Definition */ #define M98095_000_HOST_DATA … #define M98095_001_HOST_INT_STS … #define M98095_002_HOST_RSP_STS … #define M98095_003_HOST_CMD_STS … #define M98095_004_CODEC_STS … #define M98095_005_DAI1_ALC_STS … #define M98095_006_DAI2_ALC_STS … #define M98095_007_JACK_AUTO_STS … #define M98095_008_JACK_MANUAL_STS … #define M98095_009_JACK_VBAT_STS … #define M98095_00A_ACC_ADC_STS … #define M98095_00B_MIC_NG_AGC_STS … #define M98095_00C_SPK_L_VOLT_STS … #define M98095_00D_SPK_R_VOLT_STS … #define M98095_00E_TEMP_SENSOR_STS … #define M98095_00F_HOST_CFG … #define M98095_010_HOST_INT_CFG … #define M98095_011_HOST_INT_EN … #define M98095_012_CODEC_INT_EN … #define M98095_013_JACK_INT_EN … #define M98095_014_JACK_INT_EN … #define M98095_015_DEC … #define M98095_016_RESERVED … #define M98095_017_RESERVED … #define M98095_018_KEYCODE3 … #define M98095_019_KEYCODE2 … #define M98095_01A_KEYCODE1 … #define M98095_01B_KEYCODE0 … #define M98095_01C_OEMCODE1 … #define M98095_01D_OEMCODE0 … #define M98095_01E_XCFG1 … #define M98095_01F_XCFG2 … #define M98095_020_XCFG3 … #define M98095_021_XCFG4 … #define M98095_022_XCFG5 … #define M98095_023_XCFG6 … #define M98095_024_XGPIO … #define M98095_025_XCLKCFG … #define M98095_026_SYS_CLK … #define M98095_027_DAI1_CLKMODE … #define M98095_028_DAI1_CLKCFG_HI … #define M98095_029_DAI1_CLKCFG_LO … #define M98095_02A_DAI1_FORMAT … #define M98095_02B_DAI1_CLOCK … #define M98095_02C_DAI1_IOCFG … #define M98095_02D_DAI1_TDM … #define M98095_02E_DAI1_FILTERS … #define M98095_02F_DAI1_LVL1 … #define M98095_030_DAI1_LVL2 … #define M98095_031_DAI2_CLKMODE … #define M98095_032_DAI2_CLKCFG_HI … #define M98095_033_DAI2_CLKCFG_LO … #define M98095_034_DAI2_FORMAT … #define M98095_035_DAI2_CLOCK … #define M98095_036_DAI2_IOCFG … #define M98095_037_DAI2_TDM … #define M98095_038_DAI2_FILTERS … #define M98095_039_DAI2_LVL1 … #define M98095_03A_DAI2_LVL2 … #define M98095_03B_DAI3_CLKMODE … #define M98095_03C_DAI3_CLKCFG_HI … #define M98095_03D_DAI3_CLKCFG_LO … #define M98095_03E_DAI3_FORMAT … #define M98095_03F_DAI3_CLOCK … #define M98095_040_DAI3_IOCFG … #define M98095_041_DAI3_TDM … #define M98095_042_DAI3_FILTERS … #define M98095_043_DAI3_LVL1 … #define M98095_044_DAI3_LVL2 … #define M98095_045_CFG_DSP … #define M98095_046_DAC_CTRL1 … #define M98095_047_DAC_CTRL2 … #define M98095_048_MIX_DAC_LR … #define M98095_049_MIX_DAC_M … #define M98095_04A_MIX_ADC_LEFT … #define M98095_04B_MIX_ADC_RIGHT … #define M98095_04C_MIX_HP_LEFT … #define M98095_04D_MIX_HP_RIGHT … #define M98095_04E_CFG_HP … #define M98095_04F_MIX_RCV … #define M98095_050_MIX_SPK_LEFT … #define M98095_051_MIX_SPK_RIGHT … #define M98095_052_MIX_SPK_CFG … #define M98095_053_MIX_LINEOUT1 … #define M98095_054_MIX_LINEOUT2 … #define M98095_055_MIX_LINEOUT_CFG … #define M98095_056_LVL_SIDETONE_DAI12 … #define M98095_057_LVL_SIDETONE_DAI3 … #define M98095_058_LVL_DAI1_PLAY … #define M98095_059_LVL_DAI1_EQ … #define M98095_05A_LVL_DAI2_PLAY … #define M98095_05B_LVL_DAI2_EQ … #define M98095_05C_LVL_DAI3_PLAY … #define M98095_05D_LVL_ADC_L … #define M98095_05E_LVL_ADC_R … #define M98095_05F_LVL_MIC1 … #define M98095_060_LVL_MIC2 … #define M98095_061_LVL_LINEIN … #define M98095_062_LVL_LINEOUT1 … #define M98095_063_LVL_LINEOUT2 … #define M98095_064_LVL_HP_L … #define M98095_065_LVL_HP_R … #define M98095_066_LVL_RCV … #define M98095_067_LVL_SPK_L … #define M98095_068_LVL_SPK_R … #define M98095_069_MICAGC_CFG … #define M98095_06A_MICAGC_THRESH … #define M98095_06B_SPK_NOISEGATE … #define M98095_06C_DAI1_ALC1_TIME … #define M98095_06D_DAI1_ALC1_COMP … #define M98095_06E_DAI1_ALC1_EXPN … #define M98095_06F_DAI1_ALC1_GAIN … #define M98095_070_DAI1_ALC2_TIME … #define M98095_071_DAI1_ALC2_COMP … #define M98095_072_DAI1_ALC2_EXPN … #define M98095_073_DAI1_ALC2_GAIN … #define M98095_074_DAI1_ALC3_TIME … #define M98095_075_DAI1_ALC3_COMP … #define M98095_076_DAI1_ALC3_EXPN … #define M98095_077_DAI1_ALC3_GAIN … #define M98095_078_DAI2_ALC1_TIME … #define M98095_079_DAI2_ALC1_COMP … #define M98095_07A_DAI2_ALC1_EXPN … #define M98095_07B_DAI2_ALC1_GAIN … #define M98095_07C_DAI2_ALC2_TIME … #define M98095_07D_DAI2_ALC2_COMP … #define M98095_07E_DAI2_ALC2_EXPN … #define M98095_07F_DAI2_ALC2_GAIN … #define M98095_080_DAI2_ALC3_TIME … #define M98095_081_DAI2_ALC3_COMP … #define M98095_082_DAI2_ALC3_EXPN … #define M98095_083_DAI2_ALC3_GAIN … #define M98095_084_HP_NOISE_GATE … #define M98095_085_AUX_ADC … #define M98095_086_CFG_LINE … #define M98095_087_CFG_MIC … #define M98095_088_CFG_LEVEL … #define M98095_089_JACK_DET_AUTO … #define M98095_08A_JACK_DET_MANUAL … #define M98095_08B_JACK_KEYSCAN_DBC … #define M98095_08C_JACK_KEYSCAN_DLY … #define M98095_08D_JACK_KEY_THRESH … #define M98095_08E_JACK_DC_SLEW … #define M98095_08F_JACK_TEST_CFG … #define M98095_090_PWR_EN_IN … #define M98095_091_PWR_EN_OUT … #define M98095_092_PWR_EN_OUT … #define M98095_093_BIAS_CTRL … #define M98095_094_PWR_DAC_21 … #define M98095_095_PWR_DAC_03 … #define M98095_096_PWR_DAC_CK … #define M98095_097_PWR_SYS … #define M98095_0FF_REV_ID … #define M98095_REG_CNT … #define M98095_REG_MAX_CACHED … /* MAX98095 Registers Bit Fields */ /* M98095_007_JACK_AUTO_STS */ #define M98095_MIC_IN … #define M98095_LO_IN … #define M98095_HP_IN … #define M98095_DDONE … /* M98095_00F_HOST_CFG */ #define M98095_SEG … #define M98095_XTEN … #define M98095_MDLLEN … /* M98095_013_JACK_INT_EN */ #define M98095_IMIC_IN … #define M98095_ILO_IN … #define M98095_IHP_IN … #define M98095_IDDONE … /* M98095_027_DAI1_CLKMODE, M98095_031_DAI2_CLKMODE, M98095_03B_DAI3_CLKMODE */ #define M98095_CLKMODE_MASK … /* M98095_02A_DAI1_FORMAT, M98095_034_DAI2_FORMAT, M98095_03E_DAI3_FORMAT */ #define M98095_DAI_MAS … #define M98095_DAI_WCI … #define M98095_DAI_BCI … #define M98095_DAI_DLY … #define M98095_DAI_TDM … #define M98095_DAI_FSW … #define M98095_DAI_WS … /* M98095_02B_DAI1_CLOCK, M98095_035_DAI2_CLOCK, M98095_03F_DAI3_CLOCK */ #define M98095_DAI_BSEL64 … #define M98095_DAI_DOSR_DIV2 … #define M98095_DAI_DOSR_DIV4 … /* M98095_02C_DAI1_IOCFG, M98095_036_DAI2_IOCFG, M98095_040_DAI3_IOCFG */ #define M98095_S1NORMAL … #define M98095_S2NORMAL … #define M98095_S3NORMAL … #define M98095_SDATA … /* M98095_02E_DAI1_FILTERS, M98095_038_DAI2_FILTERS, M98095_042_DAI3_FILTERS */ #define M98095_DAI_DHF … /* M98095_045_DSP_CFG */ #define M98095_DSPNORMAL … /* M98095_048_MIX_DAC_LR */ #define M98095_DAI1L_TO_DACR … #define M98095_DAI1R_TO_DACR … #define M98095_DAI2M_TO_DACR … #define M98095_DAI1L_TO_DACL … #define M98095_DAI1R_TO_DACL … #define M98095_DAI2M_TO_DACL … #define M98095_DAI3M_TO_DACL … /* M98095_049_MIX_DAC_M */ #define M98095_DAI1L_TO_DACM … #define M98095_DAI1R_TO_DACM … #define M98095_DAI2M_TO_DACM … #define M98095_DAI3M_TO_DACM … /* M98095_04E_MIX_HP_CFG */ #define M98095_HPNORMAL … /* M98095_05F_LVL_MIC1, M98095_060_LVL_MIC2 */ #define M98095_MICPRE_MASK … #define M98095_MICPRE_SHIFT … /* M98095_064_LVL_HP_L, M98095_065_LVL_HP_R */ #define M98095_HP_MUTE … /* M98095_066_LVL_RCV */ #define M98095_REC_MUTE … /* M98095_067_LVL_SPK_L, M98095_068_LVL_SPK_R */ #define M98095_SP_MUTE … /* M98095_087_CFG_MIC */ #define M98095_MICSEL_MASK … #define M98095_DIGMIC_L … #define M98095_DIGMIC_R … #define M98095_DIGMIC2L … #define M98095_DIGMIC2R … /* M98095_088_CFG_LEVEL */ #define M98095_VSEN … #define M98095_ZDEN … #define M98095_BQ2EN … #define M98095_BQ1EN … #define M98095_EQ2EN … #define M98095_EQ1EN … /* M98095_089_JACK_DET_AUTO */ #define M98095_PIN5EN … #define M98095_JDEN … /* M98095_090_PWR_EN_IN */ #define M98095_INEN … #define M98095_MB2EN … #define M98095_MB1EN … #define M98095_MBEN … #define M98095_ADREN … #define M98095_ADLEN … /* M98095_091_PWR_EN_OUT */ #define M98095_HPLEN … #define M98095_HPREN … #define M98095_SPLEN … #define M98095_SPREN … #define M98095_RECEN … #define M98095_DALEN … #define M98095_DAREN … /* M98095_092_PWR_EN_OUT */ #define M98095_SPK_FIXEDSPECTRUM … #define M98095_SPK_SPREADSPECTRUM … /* M98095_097_PWR_SYS */ #define M98095_SHDNRUN … #define M98095_PERFMODE … #define M98095_HPPLYBACK … #define M98095_PWRSV8K … #define M98095_PWRSV … #define M98095_COEFS_PER_BAND … #define M98095_BYTE1(w) … #define M98095_BYTE0(w) … /* Equalizer filter coefficients */ #define M98095_110_DAI1_EQ_BASE … #define M98095_142_DAI2_EQ_BASE … /* Biquad filter coefficients */ #define M98095_174_DAI1_BQ_BASE … #define M98095_17E_DAI2_BQ_BASE … /* Default Delay used in Slew Rate Calculation for Jack detection */ #define M98095_DEFAULT_SLEW_DELAY … extern int max98095_jack_detect(struct snd_soc_component *component, struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack); #endif
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