// SPDX-License-Identifier: GPL-2.0 // // rt1015.h -- RT1015 ALSA SoC audio amplifier driver // // Copyright 2019 Realtek Semiconductor Corp. // Author: Jack Yu <[email protected]> // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License version 2 as // published by the Free Software Foundation. // #ifndef __RT1015_H__ #define __RT1015_H__ #include <sound/rt1015.h> #define RT1015_DEVICE_ID_VAL … #define RT1015_DEVICE_ID_VAL2 … #define RT1015_RESET … #define RT1015_CLK2 … #define RT1015_CLK3 … #define RT1015_PLL1 … #define RT1015_PLL2 … #define RT1015_DUM_RW1 … #define RT1015_DUM_RW2 … #define RT1015_DUM_RW3 … #define RT1015_DUM_RW4 … #define RT1015_DUM_RW5 … #define RT1015_DUM_RW6 … #define RT1015_CLK_DET … #define RT1015_SIL_DET … #define RT1015_CUSTOMER_ID … #define RT1015_PCODE_FWVER … #define RT1015_VER_ID … #define RT1015_VENDOR_ID … #define RT1015_DEVICE_ID … #define RT1015_PAD_DRV1 … #define RT1015_PAD_DRV2 … #define RT1015_GAT_BOOST … #define RT1015_PRO_ALT … #define RT1015_OSCK_STA … #define RT1015_MAN_I2C … #define RT1015_DAC1 … #define RT1015_DAC2 … #define RT1015_DAC3 … #define RT1015_ADC1 … #define RT1015_ADC2 … #define RT1015_TDM_MASTER … #define RT1015_TDM_TCON … #define RT1015_TDM1_1 … #define RT1015_TDM1_2 … #define RT1015_TDM1_3 … #define RT1015_TDM1_4 … #define RT1015_TDM1_5 … #define RT1015_MIXER1 … #define RT1015_MIXER2 … #define RT1015_ANA_PROTECT1 … #define RT1015_ANA_CTRL_SEQ1 … #define RT1015_ANA_CTRL_SEQ2 … #define RT1015_VBAT_DET_DEB … #define RT1015_VBAT_VOLT_DET1 … #define RT1015_VBAT_VOLT_DET2 … #define RT1015_VBAT_TEST_OUT1 … #define RT1015_VBAT_TEST_OUT2 … #define RT1015_VBAT_PROT_ATT … #define RT1015_VBAT_DET_CODE … #define RT1015_PWR1 … #define RT1015_PWR4 … #define RT1015_PWR5 … #define RT1015_PWR6 … #define RT1015_PWR7 … #define RT1015_PWR8 … #define RT1015_PWR9 … #define RT1015_CLASSD_SEQ … #define RT1015_SMART_BST_CTRL1 … #define RT1015_SMART_BST_CTRL2 … #define RT1015_ANA_CTRL1 … #define RT1015_ANA_CTRL2 … #define RT1015_PWR_STATE_CTRL … #define RT1015_MONO_DYNA_CTRL … #define RT1015_MONO_DYNA_CTRL1 … #define RT1015_MONO_DYNA_CTRL2 … #define RT1015_MONO_DYNA_CTRL3 … #define RT1015_MONO_DYNA_CTRL4 … #define RT1015_MONO_DYNA_CTRL5 … #define RT1015_SPK_VOL … #define RT1015_SHORT_DETTOP1 … #define RT1015_SHORT_DETTOP2 … #define RT1015_SPK_DC_DETECT1 … #define RT1015_SPK_DC_DETECT2 … #define RT1015_SPK_DC_DETECT3 … #define RT1015_SPK_DC_DETECT4 … #define RT1015_SPK_DC_DETECT5 … #define RT1015_BAT_RPO_STEP1 … #define RT1015_BAT_RPO_STEP2 … #define RT1015_BAT_RPO_STEP3 … #define RT1015_BAT_RPO_STEP4 … #define RT1015_BAT_RPO_STEP5 … #define RT1015_BAT_RPO_STEP6 … #define RT1015_BAT_RPO_STEP7 … #define RT1015_BAT_RPO_STEP8 … #define RT1015_BAT_RPO_STEP9 … #define RT1015_BAT_RPO_STEP10 … #define RT1015_BAT_RPO_STEP11 … #define RT1015_BAT_RPO_STEP12 … #define RT1015_SPREAD_SPEC1 … #define RT1015_SPREAD_SPEC2 … #define RT1015_PAD_STATUS … #define RT1015_PADS_PULLING_CTRL1 … #define RT1015_PADS_DRIVING … #define RT1015_SYS_RST1 … #define RT1015_SYS_RST2 … #define RT1015_SYS_GATING1 … #define RT1015_TEST_MODE1 … #define RT1015_TEST_MODE2 … #define RT1015_TIMING_CTRL1 … #define RT1015_PLL_INT … #define RT1015_TEST_OUT1 … #define RT1015_DC_CALIB_CLSD1 … #define RT1015_DC_CALIB_CLSD2 … #define RT1015_DC_CALIB_CLSD3 … #define RT1015_DC_CALIB_CLSD4 … #define RT1015_DC_CALIB_CLSD5 … #define RT1015_DC_CALIB_CLSD6 … #define RT1015_DC_CALIB_CLSD7 … #define RT1015_DC_CALIB_CLSD8 … #define RT1015_DC_CALIB_CLSD9 … #define RT1015_DC_CALIB_CLSD10 … #define RT1015_CLSD_INTERNAL1 … #define RT1015_CLSD_INTERNAL2 … #define RT1015_CLSD_INTERNAL3 … #define RT1015_CLSD_INTERNAL4 … #define RT1015_CLSD_INTERNAL5 … #define RT1015_CLSD_INTERNAL6 … #define RT1015_CLSD_INTERNAL7 … #define RT1015_CLSD_INTERNAL8 … #define RT1015_CLSD_INTERNAL9 … #define RT1015_CLSD_OCP_CTRL … #define RT1015_VREF_LV … #define RT1015_MBIAS1 … #define RT1015_MBIAS2 … #define RT1015_MBIAS3 … #define RT1015_MBIAS4 … #define RT1015_VREF_LV1 … #define RT1015_S_BST_TIMING_INTER1 … #define RT1015_S_BST_TIMING_INTER2 … #define RT1015_S_BST_TIMING_INTER3 … #define RT1015_S_BST_TIMING_INTER4 … #define RT1015_S_BST_TIMING_INTER5 … #define RT1015_S_BST_TIMING_INTER6 … #define RT1015_S_BST_TIMING_INTER7 … #define RT1015_S_BST_TIMING_INTER8 … #define RT1015_S_BST_TIMING_INTER9 … #define RT1015_S_BST_TIMING_INTER10 … #define RT1015_S_BST_TIMING_INTER11 … #define RT1015_S_BST_TIMING_INTER12 … #define RT1015_S_BST_TIMING_INTER13 … #define RT1015_S_BST_TIMING_INTER14 … #define RT1015_S_BST_TIMING_INTER15 … #define RT1015_S_BST_TIMING_INTER16 … #define RT1015_S_BST_TIMING_INTER17 … #define RT1015_S_BST_TIMING_INTER18 … #define RT1015_S_BST_TIMING_INTER19 … #define RT1015_S_BST_TIMING_INTER20 … #define RT1015_S_BST_TIMING_INTER21 … #define RT1015_S_BST_TIMING_INTER22 … #define RT1015_S_BST_TIMING_INTER23 … #define RT1015_S_BST_TIMING_INTER24 … #define RT1015_S_BST_TIMING_INTER25 … #define RT1015_S_BST_TIMING_INTER26 … #define RT1015_S_BST_TIMING_INTER27 … #define RT1015_S_BST_TIMING_INTER28 … #define RT1015_S_BST_TIMING_INTER29 … #define RT1015_S_BST_TIMING_INTER30 … #define RT1015_S_BST_TIMING_INTER31 … #define RT1015_S_BST_TIMING_INTER32 … #define RT1015_S_BST_TIMING_INTER33 … #define RT1015_S_BST_TIMING_INTER34 … #define RT1015_S_BST_TIMING_INTER35 … #define RT1015_S_BST_TIMING_INTER36 … /* 0x0004 */ #define RT1015_CLK_SYS_PRE_SEL_MASK … #define RT1015_CLK_SYS_PRE_SEL_SFT … #define RT1015_CLK_SYS_PRE_SEL_MCLK … #define RT1015_CLK_SYS_PRE_SEL_PLL … #define RT1015_PLL_SEL_MASK … #define RT1015_PLL_SEL_SFT … #define RT1015_PLL_SEL_PLL_SRC2 … #define RT1015_PLL_SEL_BCLK … #define RT1015_FS_PD_MASK … #define RT1015_FS_PD_SFT … /* 0x000a */ #define RT1015_PLL_M_MAX … #define RT1015_PLL_M_MASK … #define RT1015_PLL_M_SFT … #define RT1015_PLL_M_BP … #define RT1015_PLL_M_BP_SFT … #define RT1015_PLL_N_MAX … #define RT1015_PLL_N_MASK … #define RT1015_PLL_N_SFT … /* 0x000c */ #define RT1015_PLL_BPK_MASK … #define RT1015_PLL_BPK … #define RT1015_PLL_K_MAX … #define RT1015_PLL_K_MASK … #define RT1015_PLL_K_SFT … /* 0x0020 */ #define RT1015_EN_BCLK_DET_MASK … #define RT1015_EN_BCLK_DET … #define RT1015_DIS_BCLK_DET … /* 0x007a */ #define RT1015_ID_MASK … #define RT1015_ID_VERA … #define RT1015_ID_VERB … /* 0x00f2 */ #define RT1015_MONO_LR_SEL_MASK … #define RT1015_MONO_L_CHANNEL … #define RT1015_MONO_R_CHANNEL … #define RT1015_MONO_LR_MIX_CHANNEL … /* 0x0102 */ #define RT1015_DAC_VOL_MASK … #define RT1015_DAC_VOL_SFT … /* 0x0104 */ #define RT1015_DAC_CLK … #define RT1015_DAC_CLK_BIT … /* 0x0106 */ #define RT1015_DAC_MUTE_MASK … #define RT1015_DA_MUTE_SFT … #define RT1015_DVOL_MUTE_FLAG_SFT … /* 0x0111 */ #define RT1015_TCON_TDM_MS_MASK … #define RT1015_TCON_TDM_MS_SFT … #define RT1015_TCON_TDM_MS_S … #define RT1015_TCON_TDM_MS_M … #define RT1015_I2S_DL_MASK … #define RT1015_I2S_DL_SFT … #define RT1015_I2S_DL_16 … #define RT1015_I2S_DL_20 … #define RT1015_I2S_DL_24 … #define RT1015_I2S_DL_8 … #define RT1015_I2S_M_DF_MASK … #define RT1015_I2S_M_DF_SFT … #define RT1015_I2S_M_DF_I2S … #define RT1015_I2S_M_DF_LEFT … #define RT1015_I2S_M_DF_PCM_A … #define RT1015_I2S_M_DF_PCM_B … #define RT1015_I2S_M_DF_PCM_A_N … #define RT1015_I2S_M_DF_PCM_B_N … /* TDM_tcon Setting (0x0112) */ #define RT1015_I2S_TCON_DF_MASK … #define RT1015_I2S_TCON_DF_SFT … #define RT1015_I2S_TCON_DF_I2S … #define RT1015_I2S_TCON_DF_LEFT … #define RT1015_I2S_TCON_DF_PCM_A … #define RT1015_I2S_TCON_DF_PCM_B … #define RT1015_I2S_TCON_DF_PCM_A_N … #define RT1015_I2S_TCON_DF_PCM_B_N … #define RT1015_TCON_BCLK_SEL_MASK … #define RT1015_TCON_BCLK_SEL_SFT … #define RT1015_TCON_BCLK_SEL_32FS … #define RT1015_TCON_BCLK_SEL_64FS … #define RT1015_TCON_BCLK_SEL_128FS … #define RT1015_TCON_BCLK_SEL_256FS … #define RT1015_TCON_CH_LEN_MASK … #define RT1015_TCON_CH_LEN_SFT … #define RT1015_TCON_CH_LEN_16B … #define RT1015_TCON_CH_LEN_20B … #define RT1015_TCON_CH_LEN_24B … #define RT1015_TCON_CH_LEN_32B … #define RT1015_TCON_BCLK_MST_MASK … #define RT1015_TCON_BCLK_MST_SFT … #define RT1015_TCON_BCLK_MST_INV … /* TDM1 Setting-1 (0x0114) */ #define RT1015_TDM_INV_BCLK_MASK … #define RT1015_TDM_INV_BCLK_SFT … #define RT1015_TDM_INV_BCLK … #define RT1015_I2S_CH_TX_MASK … #define RT1015_I2S_CH_TX_SFT … #define RT1015_I2S_TX_2CH … #define RT1015_I2S_TX_4CH … #define RT1015_I2S_TX_6CH … #define RT1015_I2S_TX_8CH … #define RT1015_I2S_CH_RX_MASK … #define RT1015_I2S_CH_RX_SFT … #define RT1015_I2S_RX_2CH … #define RT1015_I2S_RX_4CH … #define RT1015_I2S_RX_6CH … #define RT1015_I2S_RX_8CH … #define RT1015_I2S_LR_CH_SEL_MASK … #define RT1015_I2S_LR_CH_SEL_SFT … #define RT1015_I2S_LEFT_CH_SEL … #define RT1015_I2S_RIGHT_CH_SEL … #define RT1015_I2S_CH_TX_LEN_MASK … #define RT1015_I2S_CH_TX_LEN_SFT … #define RT1015_I2S_CH_TX_LEN_16B … #define RT1015_I2S_CH_TX_LEN_20B … #define RT1015_I2S_CH_TX_LEN_24B … #define RT1015_I2S_CH_TX_LEN_32B … #define RT1015_I2S_CH_TX_LEN_8B … #define RT1015_I2S_CH_RX_LEN_MASK … #define RT1015_I2S_CH_RX_LEN_SFT … #define RT1015_I2S_CH_RX_LEN_16B … #define RT1015_I2S_CH_RX_LEN_20B … #define RT1015_I2S_CH_RX_LEN_24B … #define RT1015_I2S_CH_RX_LEN_32B … #define RT1015_I2S_CH_RX_LEN_8B … /* TDM1 Setting-4 (0x011a) */ #define RT1015_TDM_I2S_TX_L_DAC1_1_MASK … #define RT1015_TDM_I2S_TX_R_DAC1_1_MASK … #define RT1015_TDM_I2S_TX_L_DAC1_1_SFT … #define RT1015_TDM_I2S_TX_R_DAC1_1_SFT … /* 0x0330 */ #define RT1015_ABST_AUTO_EN_MASK … #define RT1015_ABST_AUTO_MODE … #define RT1015_ABST_REG_MODE … #define RT1015_ABST_FIX_TGT_MASK … #define RT1015_ABST_FIX_TGT_EN … #define RT1015_ABST_FIX_TGT_DIS … #define RT1015_BYPASS_SWR_REG_MASK … #define RT1015_BYPASS_SWRREG_BYPASS … #define RT1015_BYPASS_SWRREG_PASS … /* 0x0322 */ #define RT1015_PWR_LDO2 … #define RT1015_PWR_LDO2_BIT … #define RT1015_PWR_DAC … #define RT1015_PWR_DAC_BIT … #define RT1015_PWR_INTCLK … #define RT1015_PWR_INTCLK_BIT … #define RT1015_PWR_ISENSE … #define RT1015_PWR_ISENSE_BIT … #define RT1015_PWR_VSENSE … #define RT1015_PWR_VSENSE_BIT … #define RT1015_PWR_PLL … #define RT1015_PWR_PLL_BIT … #define RT1015_PWR_BG_1_2 … #define RT1015_PWR_BG_1_2_BIT … #define RT1015_PWR_MBIAS_BG … #define RT1015_PWR_MBIAS_BG_BIT … #define RT1015_PWR_VBAT … #define RT1015_PWR_VBAT_BIT … #define RT1015_PWR_MBIAS … #define RT1015_PWR_MBIAS_BIT … #define RT1015_PWR_ADCV … #define RT1015_PWR_ADCV_BIT … #define RT1015_PWR_MIXERV … #define RT1015_PWR_MIXERV_BIT … #define RT1015_PWR_SUMV … #define RT1015_PWR_SUMV_BIT … #define RT1015_PWR_VREFLV … #define RT1015_PWR_VREFLV_BIT … /* 0x0324 */ #define RT1015_PWR_BASIC … #define RT1015_PWR_BASIC_BIT … #define RT1015_PWR_SD … #define RT1015_PWR_SD_BIT … #define RT1015_PWR_IBIAS … #define RT1015_PWR_IBIAS_BIT … #define RT1015_PWR_VCM … #define RT1015_PWR_VCM_BIT … /* 0x0328 */ #define RT1015_PWR_SWR … #define RT1015_PWR_SWR_BIT … /* 0x0519 */ #define RT1015_EN_CLA_D_DC_DET_MASK … #define RT1015_EN_CLA_D_DC_DET … #define RT1015_DIS_CLA_D_DC_DET … /* 0x1300 */ #define RT1015_PWR_CLSD … #define RT1015_PWR_CLSD_BIT … /* 0x007a */ #define RT1015_ID_MASK … #define RT1015_ID_VERA … #define RT1015_ID_VERB … /* System Clock Source */ enum { … }; /* PLL1 Source */ enum { … }; enum { … }; enum { … }; enum { … }; enum { … }; enum { … }; struct rt1015_priv { … }; #endif /* __RT1015_H__ */
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