linux/sound/soc/amd/vangogh/acp5x.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * AMD ALSA SoC PCM Driver
 *
 * Copyright (C) 2021 Advanced Micro Devices, Inc. All rights reserved.
 */

#include "vg_chip_offset_byte.h"
#include <sound/pcm.h>

#define ACP5x_PHY_BASE_ADDRESS …
#define ACP_DEVICE_ID …
#define ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK …

#define ACP_PGFSM_CNTL_POWER_ON_MASK …
#define ACP_PGFSM_CNTL_POWER_OFF_MASK …
#define ACP_PGFSM_STATUS_MASK …
#define ACP_POWERED_ON …
#define ACP_POWER_ON_IN_PROGRESS …
#define ACP_POWERED_OFF …
#define ACP_POWER_OFF_IN_PROGRESS …

#define ACP_ERR_INTR_MASK …
#define ACP_EXT_INTR_STAT_CLEAR_MASK …

#define ACP5x_DEVS …
#define ACP5x_REG_START …
#define ACP5x_REG_END …
#define ACP5x_I2STDM_REG_START …
#define ACP5x_I2STDM_REG_END …
#define ACP5x_HS_TDM_REG_START …
#define ACP5x_HS_TDM_REG_END …
#define I2S_MODE …
#define ACP5x_I2S_MODE …
#define ACP5x_RES …
#define I2S_RX_THRESHOLD …
#define I2S_TX_THRESHOLD …
#define HS_TX_THRESHOLD …
#define HS_RX_THRESHOLD …

#define I2S_SP_INSTANCE …
#define I2S_HS_INSTANCE …

#define ACP_SRAM_PTE_OFFSET …
#define ACP_SRAM_SP_PB_PTE_OFFSET …
#define ACP_SRAM_SP_CP_PTE_OFFSET …
#define ACP_SRAM_HS_PB_PTE_OFFSET …
#define ACP_SRAM_HS_CP_PTE_OFFSET …
#define PAGE_SIZE_4K_ENABLE …
#define I2S_SP_TX_MEM_WINDOW_START …
#define I2S_SP_RX_MEM_WINDOW_START …
#define I2S_HS_TX_MEM_WINDOW_START …
#define I2S_HS_RX_MEM_WINDOW_START …

#define SP_PB_FIFO_ADDR_OFFSET …
#define SP_CAPT_FIFO_ADDR_OFFSET …
#define HS_PB_FIFO_ADDR_OFFSET …
#define HS_CAPT_FIFO_ADDR_OFFSET …
#define PLAYBACK_MIN_NUM_PERIODS …
#define PLAYBACK_MAX_NUM_PERIODS …
#define PLAYBACK_MAX_PERIOD_SIZE …
#define PLAYBACK_MIN_PERIOD_SIZE …
#define CAPTURE_MIN_NUM_PERIODS …
#define CAPTURE_MAX_NUM_PERIODS …
#define CAPTURE_MAX_PERIOD_SIZE …
#define CAPTURE_MIN_PERIOD_SIZE …

#define MAX_BUFFER …
#define MIN_BUFFER …
#define FIFO_SIZE …
#define DMA_SIZE …
#define FRM_LEN …

#define I2S_MASTER_MODE_ENABLE …
#define I2S_MASTER_MODE_DISABLE …

#define SLOT_WIDTH_8 …
#define SLOT_WIDTH_16 …
#define SLOT_WIDTH_24 …
#define SLOT_WIDTH_32 …
#define TDM_ENABLE …
#define TDM_DISABLE …
#define ACP5x_ITER_IRER_SAMP_LEN_MASK …

struct i2s_dev_data { … };

struct i2s_stream_instance { … };

acp_dma_count;

struct acp5x_platform_info { … };

acp_i2stdm_mstrclkgen;

/* common header file uses exact offset rather than relative
 * offset which requires subtraction logic from base_addr
 * for accessing ACP5x MMIO space registers
 */
static inline u32 acp_readl(void __iomem *base_addr)
{ … }

static inline void acp_writel(u32 val, void __iomem *base_addr)
{ … }

int snd_amd_acp_find_config(struct pci_dev *pci);

static inline u64 acp_get_byte_count(struct i2s_stream_instance *rtd,
				     int direction)
{ … }

static inline void acp5x_set_i2s_clk(struct i2s_dev_data *adata,
				     struct i2s_stream_instance *rtd)
{ … }