/* SPDX-License-Identifier: GPL-2.0-only */ /* * Intel KeemBay Platform driver * * Copyright (C) 2020 Intel Corporation. * */ #ifndef KMB_PLATFORM_H_ #define KMB_PLATFORM_H_ #include <linux/bits.h> #include <linux/bitfield.h> #include <linux/types.h> #include <sound/dmaengine_pcm.h> /* Register values with reference to KMB databook v1.1 */ /* common register for all channel */ #define IER … #define IRER … #define ITER … #define CER … #define CCR … #define RXFFR … #define TXFFR … /* Interrupt status register fields */ #define ISR_TXFO … #define ISR_TXFE … #define ISR_RXFO … #define ISR_RXDA … /* I2S Tx Rx Registers for all channels */ #define LRBR_LTHR(x) … #define RRBR_RTHR(x) … #define RER(x) … #define TER(x) … #define RCR(x) … #define TCR(x) … #define ISR(x) … #define IMR(x) … #define ROR(x) … #define TOR(x) … #define RFCR(x) … #define TFCR(x) … #define RFF(x) … #define TFF(x) … /* I2S COMP Registers */ #define I2S_COMP_PARAM_2 … #define I2S_COMP_PARAM_1 … #define I2S_COMP_VERSION … #define I2S_COMP_TYPE … /* PSS_GEN_CTRL_I2S_GEN_CFG_0 Registers */ #define I2S_GEN_CFG_0 … #define PSS_CPR_RST_EN … #define PSS_CPR_RST_SET … #define PSS_CPR_CLK_CLR … #define PSS_CPR_AUX_RST_EN … #define CLOCK_PROVIDER_MODE … /* Interrupt Flag */ #define TX_INT_FLAG … #define RX_INT_FLAG … /* * Component parameter register fields - define the I2S block's * configuration. */ #define COMP1_TX_WORDSIZE_3(r) … #define COMP1_TX_WORDSIZE_2(r) … #define COMP1_TX_WORDSIZE_1(r) … #define COMP1_TX_WORDSIZE_0(r) … #define COMP1_RX_ENABLED(r) … #define COMP1_TX_ENABLED(r) … #define COMP1_MODE_EN(r) … #define COMP1_APB_DATA_WIDTH(r) … #define COMP2_RX_WORDSIZE_3(r) … #define COMP2_RX_WORDSIZE_2(r) … #define COMP2_RX_WORDSIZE_1(r) … #define COMP2_RX_WORDSIZE_0(r) … /* Add 1 to the below registers to indicate the actual size */ #define COMP1_TX_CHANNELS(r) … #define COMP1_RX_CHANNELS(r) … #define COMP1_FIFO_DEPTH(r) … /* Number of entries in WORDSIZE and DATA_WIDTH parameter registers */ #define COMP_MAX_WORDSIZE … #define MAX_CHANNEL_NUM … #define MIN_CHANNEL_NUM … #define MAX_ISR … #define TWO_CHANNEL_SUPPORT … #define FOUR_CHANNEL_SUPPORT … #define SIX_CHANNEL_SUPPORT … #define EIGHT_CHANNEL_SUPPORT … #define DWC_I2S_PLAY … #define DWC_I2S_RECORD … #define DW_I2S_CONSUMER … #define DW_I2S_PROVIDER … #define I2S_RXDMA … #define I2S_RRXDMA … #define I2S_TXDMA … #define I2S_RTXDMA … #define I2S_DMACR … #define I2S_DMAEN_RXBLOCK … #define I2S_DMAEN_TXBLOCK … /* * struct i2s_clk_config_data - represent i2s clk configuration data * @chan_nr: number of channel * @data_width: number of bits per sample (8/16/24/32 bit) * @sample_rate: sampling frequency (8Khz, 16Khz, 48Khz) */ struct i2s_clk_config_data { … }; struct kmb_i2s_info { … }; #endif /* KMB_PLATFORM_H_ */
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