linux/drivers/clk/samsung/clk-pll.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2013 Samsung Electronics Co., Ltd.
 * Copyright (c) 2013 Linaro Ltd.
 *
 * Common Clock Framework support for all PLL's in Samsung platforms
*/

#ifndef __SAMSUNG_CLK_PLL_H
#define __SAMSUNG_CLK_PLL_H

enum samsung_pll_type { … };

#define PLL_RATE(_fin, _m, _p, _s, _k, _ks) …
#define PLL_VALID_RATE(_fin, _fout, _m, _p, _s, _k, _ks) …

#define PLL_35XX_RATE(_fin, _rate, _m, _p, _s) …

#define PLL_36XX_RATE(_fin, _rate, _m, _p, _s, _k) …

#define PLL_4508_RATE(_fin, _rate, _m, _p, _s, _afc) …

#define PLL_4600_RATE(_fin, _rate, _m, _p, _s, _k, _vsel) …

#define PLL_4650_RATE(_fin, _rate, _m, _p, _s, _k, _mfr, _mrr, _vsel) …

/* NOTE: Rate table should be kept sorted in descending order. */

struct samsung_pll_rate_table { … };

#endif /* __SAMSUNG_CLK_PLL_H */