// SPDX-License-Identifier: GPL-2.0 // // Mediatek ALSA SoC AFE platform driver for 8186 // // Copyright (c) 2022 MediaTek Inc. // Author: Jiaxin Yu <[email protected]> #include <linux/delay.h> #include <linux/dma-mapping.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_address.h> #include <linux/pm_runtime.h> #include <linux/reset.h> #include <sound/soc.h> #include "../common/mtk-afe-platform-driver.h" #include "../common/mtk-afe-fe-dai.h" #include "mt8186-afe-common.h" #include "mt8186-afe-clk.h" #include "mt8186-afe-gpio.h" #include "mt8186-interconnection.h" static const struct snd_pcm_hardware mt8186_afe_hardware = …; static int mt8186_fe_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { … } static void mt8186_fe_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { … } static int mt8186_fe_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { … } static int mt8186_fe_hw_free(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { … } static int mt8186_fe_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *dai) { … } static int mt8186_memif_fs(struct snd_pcm_substream *substream, unsigned int rate) { … } static int mt8186_get_dai_fs(struct mtk_base_afe *afe, int dai_id, unsigned int rate) { … } static int mt8186_irq_fs(struct snd_pcm_substream *substream, unsigned int rate) { … } static int mt8186_get_memif_pbuf_size(struct snd_pcm_substream *substream) { … } static int mt8186_fe_prepare(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { … } /* FE DAIs */ static const struct snd_soc_dai_ops mt8186_memif_dai_ops = …; #define MTK_PCM_RATES … #define MTK_PCM_DAI_RATES … #define MTK_PCM_FORMATS … static struct snd_soc_dai_driver mt8186_memif_dai_driver[] = …; /* kcontrol */ static int mt8186_irq_cnt1_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int mt8186_irq_cnt1_set(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int mt8186_irq_cnt2_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int mt8186_irq_cnt2_set(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int mt8186_record_xrun_assert_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static int mt8186_record_xrun_assert_set(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { … } static const struct snd_kcontrol_new mt8186_pcm_kcontrols[] = …; /* dma widget & routes*/ static const struct snd_kcontrol_new memif_ul1_ch1_mix[] = …; static const struct snd_kcontrol_new memif_ul1_ch2_mix[] = …; static const struct snd_kcontrol_new memif_ul1_ch3_mix[] = …; static const struct snd_kcontrol_new memif_ul1_ch4_mix[] = …; static const struct snd_kcontrol_new memif_ul2_ch1_mix[] = …; static const struct snd_kcontrol_new memif_ul2_ch2_mix[] = …; static const struct snd_kcontrol_new memif_ul3_ch1_mix[] = …; static const struct snd_kcontrol_new memif_ul3_ch2_mix[] = …; static const struct snd_kcontrol_new memif_ul4_ch1_mix[] = …; static const struct snd_kcontrol_new memif_ul4_ch2_mix[] = …; static const struct snd_kcontrol_new memif_ul5_ch1_mix[] = …; static const struct snd_kcontrol_new memif_ul5_ch2_mix[] = …; static const struct snd_kcontrol_new memif_ul6_ch1_mix[] = …; static const struct snd_kcontrol_new memif_ul6_ch2_mix[] = …; static const struct snd_kcontrol_new memif_ul7_ch1_mix[] = …; static const struct snd_kcontrol_new memif_ul7_ch2_mix[] = …; static const struct snd_kcontrol_new memif_ul8_ch1_mix[] = …; static const struct snd_kcontrol_new memif_ul8_ch2_mix[] = …; static const struct snd_kcontrol_new hw_cm1_ch1_mix[] = …; static const struct snd_kcontrol_new hw_cm1_ch2_mix[] = …; static const struct snd_kcontrol_new hw_cm1_ch3_mix[] = …; static const struct snd_kcontrol_new hw_cm1_ch4_mix[] = …; static const struct snd_kcontrol_new hw_cm1_ch5_mix[] = …; static const struct snd_kcontrol_new hw_cm1_ch6_mix[] = …; static const struct snd_kcontrol_new hw_cm1_ch7_mix[] = …; static const struct snd_kcontrol_new hw_cm1_ch8_mix[] = …; static const struct snd_kcontrol_new hw_cm1_ch9_mix[] = …; static const struct snd_kcontrol_new hw_cm1_ch10_mix[] = …; static const struct snd_kcontrol_new hw_cm1_ch11_mix[] = …; static const struct snd_kcontrol_new hw_cm1_ch12_mix[] = …; /* ADDA UL MUX */ enum { … }; static const char * const ul5_in_mux_map[] = …; static int ul5_in_map_value[] = …; static SOC_VALUE_ENUM_SINGLE_DECL(ul5_in_mux_map_enum, AFE_CM1_CON, VUL3_BYPASS_CM_SFT, VUL3_BYPASS_CM_MASK, ul5_in_mux_map, ul5_in_map_value); static const struct snd_kcontrol_new ul5_in_mux_control = …; static const struct snd_soc_dapm_widget mt8186_memif_widgets[] = …; static const struct snd_soc_dapm_route mt8186_memif_routes[] = …; static const struct mtk_base_memif_data memif_data[MT8186_MEMIF_NUM] = …; static const struct mtk_base_irq_data irq_data[MT8186_IRQ_NUM] = …; static const int memif_irq_usage[MT8186_MEMIF_NUM] = …; static bool mt8186_is_volatile_reg(struct device *dev, unsigned int reg) { … } static const struct regmap_config mt8186_afe_regmap_config = …; static irqreturn_t mt8186_afe_irq_handler(int irq_id, void *dev) { … } static int mt8186_afe_runtime_suspend(struct device *dev) { … } static int mt8186_afe_runtime_resume(struct device *dev) { … } static int mt8186_afe_component_probe(struct snd_soc_component *component) { … } static const struct snd_soc_component_driver mt8186_afe_component = …; static int mt8186_dai_memif_register(struct mtk_base_afe *afe) { … } dai_register_cb; static const dai_register_cb dai_register_cbs[] = …; static int mt8186_afe_pcm_dev_probe(struct platform_device *pdev) { … } static const struct of_device_id mt8186_afe_pcm_dt_match[] = …; MODULE_DEVICE_TABLE(of, mt8186_afe_pcm_dt_match); static const struct dev_pm_ops mt8186_afe_pm_ops = …; static struct platform_driver mt8186_afe_pcm_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …;
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