linux/sound/soc/mediatek/mt8188/mt8188-afe-clk.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * mt8188-afe-clk.h  --  MediaTek 8188 afe clock ctrl definition
 *
 * Copyright (c) 2022 MediaTek Inc.
 * Author: Bicycle Tsai <[email protected]>
 *         Trevor Wu <[email protected]>
 *         Chun-Chia Chiu <[email protected]>
 */

#ifndef _MT8188_AFE_CLK_H_
#define _MT8188_AFE_CLK_H_

/* APLL */
#define APLL1_W_NAME …
#define APLL2_W_NAME …

enum { … };

enum { … };

enum { … };

struct mtk_base_afe;

int mt8188_afe_get_mclk_source_clk_id(int sel);
int mt8188_afe_get_mclk_source_rate(struct mtk_base_afe *afe, int apll);
int mt8188_afe_get_default_mclk_source_by_rate(int rate);
int mt8188_get_apll_by_rate(struct mtk_base_afe *afe, int rate);
int mt8188_get_apll_by_name(struct mtk_base_afe *afe, const char *name);
int mt8188_afe_init_clock(struct mtk_base_afe *afe);
int mt8188_afe_enable_clk(struct mtk_base_afe *afe, struct clk *clk);
void mt8188_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk);
int mt8188_afe_set_clk_rate(struct mtk_base_afe *afe, struct clk *clk,
			    unsigned int rate);
int mt8188_afe_set_clk_parent(struct mtk_base_afe *afe, struct clk *clk,
			      struct clk *parent);
int mt8188_apll1_enable(struct mtk_base_afe *afe);
int mt8188_apll1_disable(struct mtk_base_afe *afe);
int mt8188_apll2_enable(struct mtk_base_afe *afe);
int mt8188_apll2_disable(struct mtk_base_afe *afe);
int mt8188_afe_enable_main_clock(struct mtk_base_afe *afe);
int mt8188_afe_disable_main_clock(struct mtk_base_afe *afe);
int mt8188_afe_enable_reg_rw_clk(struct mtk_base_afe *afe);
int mt8188_afe_disable_reg_rw_clk(struct mtk_base_afe *afe);

#endif