// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) // // This file is provided under a dual BSD/GPLv2 license. When using or // redistributing this file, you may do so under either license. // // Copyright(c) 2018 Intel Corporation // // Authors: Liam Girdwood <[email protected]> // Ranjani Sridharan <[email protected]> // Rander Wang <[email protected]> // Keyon Jie <[email protected]> // /* * Hardware interface for generic Intel audio DSP HDA IP */ #include <linux/module.h> #include <sound/hdaudio_ext.h> #include <sound/hda_register.h> #include <sound/hda-mlink.h> #include <trace/events/sof_intel.h> #include <sound/sof/xtensa.h> #include "../sof-audio.h" #include "../ops.h" #include "hda.h" #include "mtl.h" #include "hda-ipc.h" #define EXCEPT_MAX_HDR_SIZE … #define HDA_EXT_ROM_STATUS_SIZE … struct hda_dsp_msg_code { … }; static bool hda_enable_trace_D0I3_S0; #if IS_ENABLED(CONFIG_SND_SOC_SOF_DEBUG) module_param_named(enable_trace_D0I3_S0, hda_enable_trace_D0I3_S0, bool, 0444); MODULE_PARM_DESC(…) …; #endif static void hda_get_interfaces(struct snd_sof_dev *sdev, u32 *interface_mask) { … } u32 hda_get_interface_mask(struct snd_sof_dev *sdev) { … } EXPORT_SYMBOL_NS(…); bool hda_is_chain_dma_supported(struct snd_sof_dev *sdev, u32 dai_type) { … } EXPORT_SYMBOL_NS(…); /* * DSP Core control. */ static int hda_dsp_core_reset_enter(struct snd_sof_dev *sdev, unsigned int core_mask) { … } static int hda_dsp_core_reset_leave(struct snd_sof_dev *sdev, unsigned int core_mask) { … } int hda_dsp_core_stall_reset(struct snd_sof_dev *sdev, unsigned int core_mask) { … } EXPORT_SYMBOL_NS(…); bool hda_dsp_core_is_enabled(struct snd_sof_dev *sdev, unsigned int core_mask) { … } EXPORT_SYMBOL_NS(…); int hda_dsp_core_run(struct snd_sof_dev *sdev, unsigned int core_mask) { … } EXPORT_SYMBOL_NS(…); /* * Power Management. */ int hda_dsp_core_power_up(struct snd_sof_dev *sdev, unsigned int core_mask) { … } EXPORT_SYMBOL_NS(…); static int hda_dsp_core_power_down(struct snd_sof_dev *sdev, unsigned int core_mask) { … } int hda_dsp_enable_core(struct snd_sof_dev *sdev, unsigned int core_mask) { … } EXPORT_SYMBOL_NS(…); int hda_dsp_core_reset_power_down(struct snd_sof_dev *sdev, unsigned int core_mask) { … } EXPORT_SYMBOL_NS(…); void hda_dsp_ipc_int_enable(struct snd_sof_dev *sdev) { … } EXPORT_SYMBOL_NS(…); void hda_dsp_ipc_int_disable(struct snd_sof_dev *sdev) { … } EXPORT_SYMBOL_NS(…); static int hda_dsp_wait_d0i3c_done(struct snd_sof_dev *sdev) { … } static int hda_dsp_send_pm_gate_ipc(struct snd_sof_dev *sdev, u32 flags) { … } static int hda_dsp_update_d0i3c_register(struct snd_sof_dev *sdev, u8 value) { … } /* * d0i3 streaming is enabled if all the active streams can * work in d0i3 state and playback is enabled */ static bool hda_dsp_d0i3_streaming_applicable(struct snd_sof_dev *sdev) { … } static int hda_dsp_set_D0_state(struct snd_sof_dev *sdev, const struct sof_dsp_power_state *target_state) { … } /* helper to log DSP state */ static void hda_dsp_state_log(struct snd_sof_dev *sdev) { … } /* * All DSP power state transitions are initiated by the driver. * If the requested state change fails, the error is simply returned. * Further state transitions are attempted only when the set_power_save() op * is called again either because of a new IPC sent to the DSP or * during system suspend/resume. */ static int hda_dsp_set_power_state(struct snd_sof_dev *sdev, const struct sof_dsp_power_state *target_state) { … } int hda_dsp_set_power_state_ipc3(struct snd_sof_dev *sdev, const struct sof_dsp_power_state *target_state) { … } EXPORT_SYMBOL_NS(…); int hda_dsp_set_power_state_ipc4(struct snd_sof_dev *sdev, const struct sof_dsp_power_state *target_state) { … } EXPORT_SYMBOL_NS(…); /* * Audio DSP states may transform as below:- * * Opportunistic D0I3 in S0 * Runtime +---------------------+ Delayed D0i3 work timeout * suspend | +--------------------+ * +------------+ D0I0(active) | | * | | <---------------+ | * | +--------> | New IPC | | * | |Runtime +--^--+---------^--+--+ (via mailbox) | | * | |resume | | | | | | * | | | | | | | | * | | System| | | | | | * | | resume| | S3/S0IX | | | | * | | | | suspend | | S0IX | | * | | | | | |suspend | | * | | | | | | | | * | | | | | | | | * +-v---+-----------+--v-------+ | | +------+----v----+ * | | | +-----------> | * | D3 (suspended) | | | D0I3 | * | | +--------------+ | * | | System resume | | * +----------------------------+ +----------------+ * * S0IX suspend: The DSP is in D0I3 if any D0I3-compatible streams * ignored the suspend trigger. Otherwise the DSP * is in D3. */ static int hda_suspend(struct snd_sof_dev *sdev, bool runtime_suspend) { … } static int hda_resume(struct snd_sof_dev *sdev, bool runtime_resume) { … } int hda_dsp_resume(struct snd_sof_dev *sdev) { … } EXPORT_SYMBOL_NS(…); int hda_dsp_runtime_resume(struct snd_sof_dev *sdev) { … } EXPORT_SYMBOL_NS(…); int hda_dsp_runtime_idle(struct snd_sof_dev *sdev) { … } EXPORT_SYMBOL_NS(…); int hda_dsp_runtime_suspend(struct snd_sof_dev *sdev) { … } EXPORT_SYMBOL_NS(…); int hda_dsp_suspend(struct snd_sof_dev *sdev, u32 target_state) { … } EXPORT_SYMBOL_NS(…); static unsigned int hda_dsp_check_for_dma_streams(struct snd_sof_dev *sdev) { … } static int hda_dsp_s5_quirk(struct snd_sof_dev *sdev) { … } int hda_dsp_shutdown_dma_flush(struct snd_sof_dev *sdev) { … } EXPORT_SYMBOL_NS(…); int hda_dsp_shutdown(struct snd_sof_dev *sdev) { … } EXPORT_SYMBOL_NS(…); int hda_dsp_set_hw_params_upon_resume(struct snd_sof_dev *sdev) { … } EXPORT_SYMBOL_NS(…); void hda_dsp_d0i3_work(struct work_struct *work) { … } EXPORT_SYMBOL_NS(…); int hda_dsp_core_get(struct snd_sof_dev *sdev, int core) { … } EXPORT_SYMBOL_NS(…); #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE) void hda_common_enable_sdw_irq(struct snd_sof_dev *sdev, bool enable) { … } EXPORT_SYMBOL_NS(…); void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable) { … } EXPORT_SYMBOL_NS(…); int hda_sdw_check_lcount_common(struct snd_sof_dev *sdev) { … } EXPORT_SYMBOL_NS(…); int hda_sdw_check_lcount_ext(struct snd_sof_dev *sdev) { … } EXPORT_SYMBOL_NS(…); int hda_sdw_check_lcount(struct snd_sof_dev *sdev) { … } EXPORT_SYMBOL_NS(…); void hda_sdw_process_wakeen(struct snd_sof_dev *sdev) { … } EXPORT_SYMBOL_NS(…); #endif int hda_dsp_disable_interrupts(struct snd_sof_dev *sdev) { … } EXPORT_SYMBOL_NS(…); static const struct hda_dsp_msg_code hda_dsp_rom_fw_error_texts[] = …; #define FSR_ROM_STATE_ENTRY(state) … static const struct hda_dsp_msg_code cavs_fsr_rom_state_names[] = …; static const struct hda_dsp_msg_code ace_fsr_rom_state_names[] = …; #define FSR_BRINGUP_STATE_ENTRY(state) … static const struct hda_dsp_msg_code fsr_bringup_state_names[] = …; #define FSR_WAIT_STATE_ENTRY(state) … static const struct hda_dsp_msg_code fsr_wait_state_names[] = …; #define FSR_MODULE_NAME_ENTRY(mod) … static const char * const fsr_module_names[] = …; static const char * hda_dsp_get_state_text(u32 code, const struct hda_dsp_msg_code *msg_code, size_t array_size) { … } void hda_dsp_get_state(struct snd_sof_dev *sdev, const char *level) { … } EXPORT_SYMBOL_NS(…); static void hda_dsp_get_registers(struct snd_sof_dev *sdev, struct sof_ipc_dsp_oops_xtensa *xoops, struct sof_ipc_panic_info *panic_info, u32 *stack, size_t stack_words) { … } /* dump the first 8 dwords representing the extended ROM status */ void hda_dsp_dump_ext_rom_status(struct snd_sof_dev *sdev, const char *level, u32 flags) { … } void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags) { … } EXPORT_SYMBOL_NS(…);
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