linux/drivers/dma/dw/core.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Core driver for the Synopsys DesignWare DMA Controller
 *
 * Copyright (C) 2007-2008 Atmel Corporation
 * Copyright (C) 2010-2011 ST Microelectronics
 * Copyright (C) 2013 Intel Corporation
 */

#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/dmaengine.h>
#include <linux/dma-mapping.h>
#include <linux/dmapool.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/log2.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/pm_runtime.h>

#include "../dmaengine.h"
#include "internal.h"

/*
 * This supports the Synopsys "DesignWare AHB Central DMA Controller",
 * (DW_ahb_dmac) which is used with various AMBA 2.0 systems (not all
 * of which use ARM any more).  See the "Databook" from Synopsys for
 * information beyond what licensees probably provide.
 */

/* The set of bus widths supported by the DMA controller */
#define DW_DMA_BUSWIDTHS …

/*----------------------------------------------------------------------*/

static struct device *chan2dev(struct dma_chan *chan)
{ … }

static struct dw_desc *dwc_first_active(struct dw_dma_chan *dwc)
{ … }

static dma_cookie_t dwc_tx_submit(struct dma_async_tx_descriptor *tx)
{ … }

static struct dw_desc *dwc_desc_get(struct dw_dma_chan *dwc)
{ … }

static void dwc_desc_put(struct dw_dma_chan *dwc, struct dw_desc *desc)
{ … }

static void dwc_initialize(struct dw_dma_chan *dwc)
{ … }

/*----------------------------------------------------------------------*/

static inline void dwc_dump_chan_regs(struct dw_dma_chan *dwc)
{ … }

static inline void dwc_chan_disable(struct dw_dma *dw, struct dw_dma_chan *dwc)
{ … }

/*----------------------------------------------------------------------*/

/* Perform single block transfer */
static inline void dwc_do_single_block(struct dw_dma_chan *dwc,
				       struct dw_desc *desc)
{ … }

/* Called with dwc->lock held and bh disabled */
static void dwc_dostart(struct dw_dma_chan *dwc, struct dw_desc *first)
{ … }

static void dwc_dostart_first_queued(struct dw_dma_chan *dwc)
{ … }

/*----------------------------------------------------------------------*/

static void
dwc_descriptor_complete(struct dw_dma_chan *dwc, struct dw_desc *desc,
		bool callback_required)
{ … }

static void dwc_complete_all(struct dw_dma *dw, struct dw_dma_chan *dwc)
{ … }

/* Returns how many bytes were already received from source */
static inline u32 dwc_get_sent(struct dw_dma_chan *dwc)
{ … }

static void dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc)
{ … }

static inline void dwc_dump_lli(struct dw_dma_chan *dwc, struct dw_desc *desc)
{ … }

static void dwc_handle_error(struct dw_dma *dw, struct dw_dma_chan *dwc)
{ … }

static void dw_dma_tasklet(struct tasklet_struct *t)
{ … }

static irqreturn_t dw_dma_interrupt(int irq, void *dev_id)
{ … }

/*----------------------------------------------------------------------*/

static struct dma_async_tx_descriptor *
dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
		size_t len, unsigned long flags)
{ … }

static struct dma_async_tx_descriptor *
dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
		unsigned int sg_len, enum dma_transfer_direction direction,
		unsigned long flags, void *context)
{ … }

bool dw_dma_filter(struct dma_chan *chan, void *param)
{ … }
EXPORT_SYMBOL_GPL(…);

static int dwc_verify_maxburst(struct dma_chan *chan)
{ … }

static int dwc_verify_p_buswidth(struct dma_chan *chan)
{ … }

static int dwc_verify_m_buswidth(struct dma_chan *chan)
{ … }

static int dwc_config(struct dma_chan *chan, struct dma_slave_config *sconfig)
{ … }

static void dwc_chan_pause(struct dw_dma_chan *dwc, bool drain)
{ … }

static int dwc_pause(struct dma_chan *chan)
{ … }

static inline void dwc_chan_resume(struct dw_dma_chan *dwc, bool drain)
{ … }

static int dwc_resume(struct dma_chan *chan)
{ … }

static int dwc_terminate_all(struct dma_chan *chan)
{ … }

static struct dw_desc *dwc_find_desc(struct dw_dma_chan *dwc, dma_cookie_t c)
{ … }

static u32 dwc_get_residue_and_status(struct dw_dma_chan *dwc, dma_cookie_t cookie,
				      enum dma_status *status)
{ … }

static enum dma_status
dwc_tx_status(struct dma_chan *chan,
	      dma_cookie_t cookie,
	      struct dma_tx_state *txstate)
{ … }

static void dwc_issue_pending(struct dma_chan *chan)
{ … }

/*----------------------------------------------------------------------*/

void do_dw_dma_off(struct dw_dma *dw)
{ … }

void do_dw_dma_on(struct dw_dma *dw)
{ … }

static int dwc_alloc_chan_resources(struct dma_chan *chan)
{ … }

static void dwc_free_chan_resources(struct dma_chan *chan)
{ … }

static void dwc_caps(struct dma_chan *chan, struct dma_slave_caps *caps)
{ … }

int do_dma_probe(struct dw_dma_chip *chip)
{ … }

int do_dma_remove(struct dw_dma_chip *chip)
{ … }

int do_dw_dma_disable(struct dw_dma_chip *chip)
{ … }
EXPORT_SYMBOL_GPL(…);

int do_dw_dma_enable(struct dw_dma_chip *chip)
{ … }
EXPORT_SYMBOL_GPL(…);

MODULE_LICENSE(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_AUTHOR(…) …;
MODULE_AUTHOR(…) …;