linux/drivers/dma/hsu/hsu.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Core driver for the High Speed UART DMA
 *
 * Copyright (C) 2015 Intel Corporation
 * Author: Andy Shevchenko <[email protected]>
 *
 * Partially based on the bits found in drivers/tty/serial/mfd.c.
 */

/*
 * DMA channel allocation:
 * 1. Even number chans are used for DMA Read (UART TX), odd chans for DMA
 *    Write (UART RX).
 * 2. 0/1 channel are assigned to port 0, 2/3 chan to port 1, 4/5 chan to
 *    port 3, and so on.
 */

#include <linux/bits.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/dmaengine.h>
#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/percpu-defs.h>
#include <linux/scatterlist.h>
#include <linux/slab.h>
#include <linux/string.h>
#include <linux/spinlock.h>

#include "hsu.h"

#define HSU_DMA_BUSWIDTHS …

static inline void hsu_chan_disable(struct hsu_dma_chan *hsuc)
{ … }

static inline void hsu_chan_enable(struct hsu_dma_chan *hsuc)
{ … }

static void hsu_dma_chan_start(struct hsu_dma_chan *hsuc)
{ … }

static void hsu_dma_stop_channel(struct hsu_dma_chan *hsuc)
{ … }

static void hsu_dma_start_channel(struct hsu_dma_chan *hsuc)
{ … }

static void hsu_dma_start_transfer(struct hsu_dma_chan *hsuc)
{ … }

/*
 *      hsu_dma_get_status() - get DMA channel status
 *      @chip: HSUART DMA chip
 *      @nr: DMA channel number
 *      @status: pointer for DMA Channel Status Register value
 *
 *      Description:
 *      The function reads and clears the DMA Channel Status Register, checks
 *      if it was a timeout interrupt and returns a corresponding value.
 *
 *      Caller should provide a valid pointer for the DMA Channel Status
 *      Register value that will be returned in @status.
 *
 *      Return:
 *      1 for DMA timeout status, 0 for other DMA status, or error code for
 *      invalid parameters or no interrupt pending.
 */
int hsu_dma_get_status(struct hsu_dma_chip *chip, unsigned short nr,
		       u32 *status)
{ … }
EXPORT_SYMBOL_GPL(…);

/*
 *      hsu_dma_do_irq() - DMA interrupt handler
 *      @chip: HSUART DMA chip
 *      @nr: DMA channel number
 *      @status: Channel Status Register value
 *
 *      Description:
 *      This function handles Channel Error and Descriptor Done interrupts.
 *      This function should be called after determining that the DMA interrupt
 *      is not a normal timeout interrupt, ie. hsu_dma_get_status() returned 0.
 *
 *      Return:
 *      0 for invalid channel number, 1 otherwise.
 */
int hsu_dma_do_irq(struct hsu_dma_chip *chip, unsigned short nr, u32 status)
{ … }
EXPORT_SYMBOL_GPL(…);

static struct hsu_dma_desc *hsu_dma_alloc_desc(unsigned int nents)
{ … }

static void hsu_dma_desc_free(struct virt_dma_desc *vdesc)
{ … }

static struct dma_async_tx_descriptor *hsu_dma_prep_slave_sg(
		struct dma_chan *chan, struct scatterlist *sgl,
		unsigned int sg_len, enum dma_transfer_direction direction,
		unsigned long flags, void *context)
{ … }

static void hsu_dma_issue_pending(struct dma_chan *chan)
{ … }

static size_t hsu_dma_active_desc_size(struct hsu_dma_chan *hsuc)
{ … }

static enum dma_status hsu_dma_tx_status(struct dma_chan *chan,
	dma_cookie_t cookie, struct dma_tx_state *state)
{ … }

static int hsu_dma_slave_config(struct dma_chan *chan,
				struct dma_slave_config *config)
{ … }

static int hsu_dma_pause(struct dma_chan *chan)
{ … }

static int hsu_dma_resume(struct dma_chan *chan)
{ … }

static int hsu_dma_terminate_all(struct dma_chan *chan)
{ … }

static void hsu_dma_free_chan_resources(struct dma_chan *chan)
{ … }

static void hsu_dma_synchronize(struct dma_chan *chan)
{ … }

int hsu_dma_probe(struct hsu_dma_chip *chip)
{ … }
EXPORT_SYMBOL_GPL(…);

int hsu_dma_remove(struct hsu_dma_chip *chip)
{ … }
EXPORT_SYMBOL_GPL(…);

MODULE_LICENSE(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_AUTHOR(…) …;