linux/drivers/dma/dma-jz4780.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Ingenic JZ4780 DMA controller
 *
 * Copyright (c) 2015 Imagination Technologies
 * Author: Alex Smith <[email protected]>
 */

#include <linux/clk.h>
#include <linux/dmapool.h>
#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_dma.h>
#include <linux/platform_device.h>
#include <linux/slab.h>

#include "dmaengine.h"
#include "virt-dma.h"

/* Global registers. */
#define JZ_DMA_REG_DMAC
#define JZ_DMA_REG_DIRQP
#define JZ_DMA_REG_DDR
#define JZ_DMA_REG_DDRS
#define JZ_DMA_REG_DCKE
#define JZ_DMA_REG_DCKES
#define JZ_DMA_REG_DCKEC
#define JZ_DMA_REG_DMACP
#define JZ_DMA_REG_DSIRQP
#define JZ_DMA_REG_DSIRQM
#define JZ_DMA_REG_DCIRQP
#define JZ_DMA_REG_DCIRQM

/* Per-channel registers. */
#define JZ_DMA_REG_CHAN(n)
#define JZ_DMA_REG_DSA
#define JZ_DMA_REG_DTA
#define JZ_DMA_REG_DTC
#define JZ_DMA_REG_DRT
#define JZ_DMA_REG_DCS
#define JZ_DMA_REG_DCM
#define JZ_DMA_REG_DDA
#define JZ_DMA_REG_DSD

#define JZ_DMA_DMAC_DMAE
#define JZ_DMA_DMAC_AR
#define JZ_DMA_DMAC_HLT
#define JZ_DMA_DMAC_FAIC
#define JZ_DMA_DMAC_FMSC

#define JZ_DMA_DRT_AUTO

#define JZ_DMA_DCS_CTE
#define JZ_DMA_DCS_HLT
#define JZ_DMA_DCS_TT
#define JZ_DMA_DCS_AR
#define JZ_DMA_DCS_DES8

#define JZ_DMA_DCM_LINK
#define JZ_DMA_DCM_TIE
#define JZ_DMA_DCM_STDE
#define JZ_DMA_DCM_TSZ_SHIFT
#define JZ_DMA_DCM_TSZ_MASK
#define JZ_DMA_DCM_DP_SHIFT
#define JZ_DMA_DCM_SP_SHIFT
#define JZ_DMA_DCM_DAI
#define JZ_DMA_DCM_SAI

#define JZ_DMA_SIZE_4_BYTE
#define JZ_DMA_SIZE_1_BYTE
#define JZ_DMA_SIZE_2_BYTE
#define JZ_DMA_SIZE_16_BYTE
#define JZ_DMA_SIZE_32_BYTE
#define JZ_DMA_SIZE_64_BYTE
#define JZ_DMA_SIZE_128_BYTE

#define JZ_DMA_WIDTH_32_BIT
#define JZ_DMA_WIDTH_8_BIT
#define JZ_DMA_WIDTH_16_BIT

#define JZ_DMA_BUSWIDTHS

#define JZ4780_DMA_CTRL_OFFSET

/* macros for use with jz4780_dma_soc_data.flags */
#define JZ_SOC_DATA_ALLOW_LEGACY_DT
#define JZ_SOC_DATA_PROGRAMMABLE_DMA
#define JZ_SOC_DATA_PER_CHAN_PM
#define JZ_SOC_DATA_NO_DCKES_DCKEC
#define JZ_SOC_DATA_BREAK_LINKS

/**
 * struct jz4780_dma_hwdesc - descriptor structure read by the DMA controller.
 * @dcm: value for the DCM (channel command) register
 * @dsa: source address
 * @dta: target address
 * @dtc: transfer count (number of blocks of the transfer size specified in DCM
 * to transfer) in the low 24 bits, offset of the next descriptor from the
 * descriptor base address in the upper 8 bits.
 */
struct jz4780_dma_hwdesc {};

/* Size of allocations for hardware descriptor blocks. */
#define JZ_DMA_DESC_BLOCK_SIZE
#define JZ_DMA_MAX_DESC

struct jz4780_dma_desc {};

struct jz4780_dma_chan {};

struct jz4780_dma_soc_data {};

struct jz4780_dma_dev {};

struct jz4780_dma_filter_data {};

static inline struct jz4780_dma_chan *to_jz4780_dma_chan(struct dma_chan *chan)
{}

static inline struct jz4780_dma_desc *to_jz4780_dma_desc(
	struct virt_dma_desc *vdesc)
{}

static inline struct jz4780_dma_dev *jz4780_dma_chan_parent(
	struct jz4780_dma_chan *jzchan)
{}

static inline u32 jz4780_dma_chn_readl(struct jz4780_dma_dev *jzdma,
	unsigned int chn, unsigned int reg)
{}

static inline void jz4780_dma_chn_writel(struct jz4780_dma_dev *jzdma,
	unsigned int chn, unsigned int reg, u32 val)
{}

static inline u32 jz4780_dma_ctrl_readl(struct jz4780_dma_dev *jzdma,
	unsigned int reg)
{}

static inline void jz4780_dma_ctrl_writel(struct jz4780_dma_dev *jzdma,
	unsigned int reg, u32 val)
{}

static inline void jz4780_dma_chan_enable(struct jz4780_dma_dev *jzdma,
	unsigned int chn)
{}

static inline void jz4780_dma_chan_disable(struct jz4780_dma_dev *jzdma,
	unsigned int chn)
{}

static struct jz4780_dma_desc *
jz4780_dma_desc_alloc(struct jz4780_dma_chan *jzchan, unsigned int count,
		      enum dma_transaction_type type,
		      enum dma_transfer_direction direction)
{}

static void jz4780_dma_desc_free(struct virt_dma_desc *vdesc)
{}

static u32 jz4780_dma_transfer_size(struct jz4780_dma_chan *jzchan,
	unsigned long val, u32 *shift)
{}

static int jz4780_dma_setup_hwdesc(struct jz4780_dma_chan *jzchan,
	struct jz4780_dma_hwdesc *desc, dma_addr_t addr, size_t len,
	enum dma_transfer_direction direction)
{}

static struct dma_async_tx_descriptor *jz4780_dma_prep_slave_sg(
	struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len,
	enum dma_transfer_direction direction, unsigned long flags,
	void *context)
{}

static struct dma_async_tx_descriptor *jz4780_dma_prep_dma_cyclic(
	struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
	size_t period_len, enum dma_transfer_direction direction,
	unsigned long flags)
{}

static struct dma_async_tx_descriptor *jz4780_dma_prep_dma_memcpy(
	struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
	size_t len, unsigned long flags)
{}

static void jz4780_dma_begin(struct jz4780_dma_chan *jzchan)
{}

static void jz4780_dma_issue_pending(struct dma_chan *chan)
{}

static int jz4780_dma_terminate_all(struct dma_chan *chan)
{}

static void jz4780_dma_synchronize(struct dma_chan *chan)
{}

static int jz4780_dma_config(struct dma_chan *chan,
	struct dma_slave_config *config)
{}

static size_t jz4780_dma_desc_residue(struct jz4780_dma_chan *jzchan,
	struct jz4780_dma_desc *desc, unsigned int next_sg)
{}

static enum dma_status jz4780_dma_tx_status(struct dma_chan *chan,
	dma_cookie_t cookie, struct dma_tx_state *txstate)
{}

static bool jz4780_dma_chan_irq(struct jz4780_dma_dev *jzdma,
				struct jz4780_dma_chan *jzchan)
{}

static irqreturn_t jz4780_dma_irq_handler(int irq, void *data)
{}

static int jz4780_dma_alloc_chan_resources(struct dma_chan *chan)
{}

static void jz4780_dma_free_chan_resources(struct dma_chan *chan)
{}

static bool jz4780_dma_filter_fn(struct dma_chan *chan, void *param)
{}

static struct dma_chan *jz4780_of_dma_xlate(struct of_phandle_args *dma_spec,
	struct of_dma *ofdma)
{}

static int jz4780_dma_probe(struct platform_device *pdev)
{}

static void jz4780_dma_remove(struct platform_device *pdev)
{}

static const struct jz4780_dma_soc_data jz4740_dma_soc_data =;

static const struct jz4780_dma_soc_data jz4725b_dma_soc_data =;

static const struct jz4780_dma_soc_data jz4755_dma_soc_data =;

static const struct jz4780_dma_soc_data jz4760_dma_soc_data =;

static const struct jz4780_dma_soc_data jz4760_mdma_soc_data =;

static const struct jz4780_dma_soc_data jz4760_bdma_soc_data =;

static const struct jz4780_dma_soc_data jz4760b_dma_soc_data =;

static const struct jz4780_dma_soc_data jz4760b_mdma_soc_data =;

static const struct jz4780_dma_soc_data jz4760b_bdma_soc_data =;

static const struct jz4780_dma_soc_data jz4770_dma_soc_data =;

static const struct jz4780_dma_soc_data jz4780_dma_soc_data =;

static const struct jz4780_dma_soc_data x1000_dma_soc_data =;

static const struct jz4780_dma_soc_data x1830_dma_soc_data =;

static const struct of_device_id jz4780_dma_dt_match[] =;
MODULE_DEVICE_TABLE(of, jz4780_dma_dt_match);

static struct platform_driver jz4780_dma_driver =;

static int __init jz4780_dma_init(void)
{}
subsys_initcall(jz4780_dma_init);

static void __exit jz4780_dma_exit(void)
{}
module_exit(jz4780_dma_exit);

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();