linux/drivers/dma/sun6i-dma.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (C) 2013-2014 Allwinner Tech Co., Ltd
 * Author: Sugar <[email protected]>
 *
 * Copyright (C) 2014 Maxime Ripard
 * Maxime Ripard <[email protected]>
 */

#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/dmapool.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_dma.h>
#include <linux/platform_device.h>
#include <linux/reset.h>
#include <linux/slab.h>
#include <linux/types.h>

#include "virt-dma.h"

/*
 * Common registers
 */
#define DMA_IRQ_EN(x)
#define DMA_IRQ_HALF
#define DMA_IRQ_PKG
#define DMA_IRQ_QUEUE

#define DMA_IRQ_CHAN_NR
#define DMA_IRQ_CHAN_WIDTH


#define DMA_IRQ_STAT(x)

#define DMA_STAT

/* Offset between DMA_IRQ_EN and DMA_IRQ_STAT limits number of channels */
#define DMA_MAX_CHANNELS

/*
 * sun8i specific registers
 */
#define SUN8I_DMA_GATE
#define SUN8I_DMA_GATE_ENABLE

#define SUNXI_H3_SECURE_REG
#define SUNXI_H3_DMA_GATE
#define SUNXI_H3_DMA_GATE_ENABLE
/*
 * Channels specific registers
 */
#define DMA_CHAN_ENABLE
#define DMA_CHAN_ENABLE_START
#define DMA_CHAN_ENABLE_STOP

#define DMA_CHAN_PAUSE
#define DMA_CHAN_PAUSE_PAUSE
#define DMA_CHAN_PAUSE_RESUME

#define DMA_CHAN_LLI_ADDR

#define DMA_CHAN_CUR_CFG
#define DMA_CHAN_MAX_DRQ_A31
#define DMA_CHAN_MAX_DRQ_H6
#define DMA_CHAN_CFG_SRC_DRQ_A31(x)
#define DMA_CHAN_CFG_SRC_DRQ_H6(x)
#define DMA_CHAN_CFG_SRC_MODE_A31(x)
#define DMA_CHAN_CFG_SRC_MODE_H6(x)
#define DMA_CHAN_CFG_SRC_BURST_A31(x)
#define DMA_CHAN_CFG_SRC_BURST_H3(x)
#define DMA_CHAN_CFG_SRC_WIDTH(x)

#define DMA_CHAN_CFG_DST_DRQ_A31(x)
#define DMA_CHAN_CFG_DST_DRQ_H6(x)
#define DMA_CHAN_CFG_DST_MODE_A31(x)
#define DMA_CHAN_CFG_DST_MODE_H6(x)
#define DMA_CHAN_CFG_DST_BURST_A31(x)
#define DMA_CHAN_CFG_DST_BURST_H3(x)
#define DMA_CHAN_CFG_DST_WIDTH(x)

#define DMA_CHAN_CUR_SRC

#define DMA_CHAN_CUR_DST

#define DMA_CHAN_CUR_CNT

#define DMA_CHAN_CUR_PARA

/*
 * LLI address mangling
 *
 * The LLI link physical address is also mangled, but we avoid dealing
 * with that by allocating LLIs from the DMA32 zone.
 */
#define SRC_HIGH_ADDR(x)
#define DST_HIGH_ADDR(x)

/*
 * Various hardware related defines
 */
#define LLI_LAST_ITEM
#define NORMAL_WAIT
#define DRQ_SDRAM
#define LINEAR_MODE
#define IO_MODE

/* forward declaration */
struct sun6i_dma_dev;

/*
 * Hardware channels / ports representation
 *
 * The hardware is used in several SoCs, with differing numbers
 * of channels and endpoints. This structure ties those numbers
 * to a certain compatible string.
 */
struct sun6i_dma_config {};

/*
 * Hardware representation of the LLI
 *
 * The hardware will be fed the physical address of this structure,
 * and read its content in order to start the transfer.
 */
struct sun6i_dma_lli {};


struct sun6i_desc {};

struct sun6i_pchan {};

struct sun6i_vchan {};

struct sun6i_dma_dev {};

static struct device *chan2dev(struct dma_chan *chan)
{}

static inline struct sun6i_dma_dev *to_sun6i_dma_dev(struct dma_device *d)
{}

static inline struct sun6i_vchan *to_sun6i_vchan(struct dma_chan *chan)
{}

static inline struct sun6i_desc *
to_sun6i_desc(struct dma_async_tx_descriptor *tx)
{}

static inline void sun6i_dma_dump_com_regs(struct sun6i_dma_dev *sdev)
{}

static inline void sun6i_dma_dump_chan_regs(struct sun6i_dma_dev *sdev,
					    struct sun6i_pchan *pchan)
{}

static inline s8 convert_burst(u32 maxburst)
{}

static inline s8 convert_buswidth(enum dma_slave_buswidth addr_width)
{}

static void sun6i_enable_clock_autogate_a23(struct sun6i_dma_dev *sdev)
{}

static void sun6i_enable_clock_autogate_h3(struct sun6i_dma_dev *sdev)
{}

static void sun6i_set_burst_length_a31(u32 *p_cfg, s8 src_burst, s8 dst_burst)
{}

static void sun6i_set_burst_length_h3(u32 *p_cfg, s8 src_burst, s8 dst_burst)
{}

static void sun6i_set_drq_a31(u32 *p_cfg, s8 src_drq, s8 dst_drq)
{}

static void sun6i_set_drq_h6(u32 *p_cfg, s8 src_drq, s8 dst_drq)
{}

static void sun6i_set_mode_a31(u32 *p_cfg, s8 src_mode, s8 dst_mode)
{}

static void sun6i_set_mode_h6(u32 *p_cfg, s8 src_mode, s8 dst_mode)
{}

static size_t sun6i_get_chan_size(struct sun6i_pchan *pchan)
{}

static void *sun6i_dma_lli_add(struct sun6i_dma_lli *prev,
			       struct sun6i_dma_lli *next,
			       dma_addr_t next_phy,
			       struct sun6i_desc *txd)
{}

static inline void sun6i_dma_dump_lli(struct sun6i_vchan *vchan,
				      struct sun6i_dma_lli *v_lli,
				      dma_addr_t p_lli)
{}

static void sun6i_dma_free_desc(struct virt_dma_desc *vd)
{}

static int sun6i_dma_start_desc(struct sun6i_vchan *vchan)
{}

static void sun6i_dma_tasklet(struct tasklet_struct *t)
{}

static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id)
{}

static int set_config(struct sun6i_dma_dev *sdev,
			struct dma_slave_config *sconfig,
			enum dma_transfer_direction direction,
			u32 *p_cfg)
{}

static inline void sun6i_dma_set_addr(struct sun6i_dma_dev *sdev,
				      struct sun6i_dma_lli *v_lli,
				      dma_addr_t src, dma_addr_t dst)
{}

static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_memcpy(
		struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
		size_t len, unsigned long flags)
{}

static struct dma_async_tx_descriptor *sun6i_dma_prep_slave_sg(
		struct dma_chan *chan, struct scatterlist *sgl,
		unsigned int sg_len, enum dma_transfer_direction dir,
		unsigned long flags, void *context)
{}

static struct dma_async_tx_descriptor *sun6i_dma_prep_dma_cyclic(
					struct dma_chan *chan,
					dma_addr_t buf_addr,
					size_t buf_len,
					size_t period_len,
					enum dma_transfer_direction dir,
					unsigned long flags)
{}

static int sun6i_dma_config(struct dma_chan *chan,
			    struct dma_slave_config *config)
{}

static int sun6i_dma_pause(struct dma_chan *chan)
{}

static int sun6i_dma_resume(struct dma_chan *chan)
{}

static int sun6i_dma_terminate_all(struct dma_chan *chan)
{}

static enum dma_status sun6i_dma_tx_status(struct dma_chan *chan,
					   dma_cookie_t cookie,
					   struct dma_tx_state *state)
{}

static void sun6i_dma_issue_pending(struct dma_chan *chan)
{}

static void sun6i_dma_free_chan_resources(struct dma_chan *chan)
{}

static struct dma_chan *sun6i_dma_of_xlate(struct of_phandle_args *dma_spec,
					   struct of_dma *ofdma)
{}

static inline void sun6i_kill_tasklet(struct sun6i_dma_dev *sdev)
{}

static inline void sun6i_dma_free(struct sun6i_dma_dev *sdev)
{}

/*
 * For A31:
 *
 * There's 16 physical channels that can work in parallel.
 *
 * However we have 30 different endpoints for our requests.
 *
 * Since the channels are able to handle only an unidirectional
 * transfer, we need to allocate more virtual channels so that
 * everyone can grab one channel.
 *
 * Some devices can't work in both direction (mostly because it
 * wouldn't make sense), so we have a bit fewer virtual channels than
 * 2 channels per endpoints.
 */

static struct sun6i_dma_config sun6i_a31_dma_cfg =;

/*
 * The A23 only has 8 physical channels, a maximum DRQ port id of 24,
 * and a total of 37 usable source and destination endpoints.
 */

static struct sun6i_dma_config sun8i_a23_dma_cfg =;

static struct sun6i_dma_config sun8i_a83t_dma_cfg =;

/*
 * The H3 has 12 physical channels, a maximum DRQ port id of 27,
 * and a total of 34 usable source and destination endpoints.
 * It also supports additional burst lengths and bus widths,
 * and the burst length fields have different offsets.
 */

static struct sun6i_dma_config sun8i_h3_dma_cfg =;

/*
 * The A64 binding uses the number of dma channels from the
 * device tree node.
 */
static struct sun6i_dma_config sun50i_a64_dma_cfg =;

/*
 * The A100 binding uses the number of dma channels from the
 * device tree node.
 */
static struct sun6i_dma_config sun50i_a100_dma_cfg =;

/*
 * The H6 binding uses the number of dma channels from the
 * device tree node.
 */
static struct sun6i_dma_config sun50i_h6_dma_cfg =;

/*
 * The V3s have only 8 physical channels, a maximum DRQ port id of 23,
 * and a total of 24 usable source and destination endpoints.
 */

static struct sun6i_dma_config sun8i_v3s_dma_cfg =;

static const struct of_device_id sun6i_dma_match[] =;
MODULE_DEVICE_TABLE(of, sun6i_dma_match);

static int sun6i_dma_probe(struct platform_device *pdev)
{}

static void sun6i_dma_remove(struct platform_device *pdev)
{}

static struct platform_driver sun6i_dma_driver =;
module_platform_driver();

MODULE_DESCRIPTION();
MODULE_AUTHOR();
MODULE_AUTHOR();
MODULE_LICENSE();