// SPDX-License-Identifier: GPL-2.0+ // // Copyright (c) 2013-2014 Freescale Semiconductor, Inc // Copyright (c) 2017 Sysam, Angelo Dureghello <[email protected]> #include <linux/cleanup.h> #include <linux/clk.h> #include <linux/dmapool.h> #include <linux/module.h> #include <linux/slab.h> #include <linux/dma-mapping.h> #include <linux/pm_runtime.h> #include <linux/pm_domain.h> #include "fsl-edma-common.h" #define EDMA_CR … #define EDMA_ES … #define EDMA_ERQ … #define EDMA_EEI … #define EDMA_SERQ … #define EDMA_CERQ … #define EDMA_SEEI … #define EDMA_CEEI … #define EDMA_CINT … #define EDMA_CERR … #define EDMA_SSRT … #define EDMA_CDNE … #define EDMA_INTR … #define EDMA_ERR … #define EDMA64_ERQH … #define EDMA64_EEIH … #define EDMA64_SERQ … #define EDMA64_CERQ … #define EDMA64_SEEI … #define EDMA64_CEEI … #define EDMA64_CINT … #define EDMA64_CERR … #define EDMA64_SSRT … #define EDMA64_CDNE … #define EDMA64_INTH … #define EDMA64_INTL … #define EDMA64_ERRH … #define EDMA64_ERRL … void fsl_edma_tx_chan_handler(struct fsl_edma_chan *fsl_chan) { … } static void fsl_edma3_enable_request(struct fsl_edma_chan *fsl_chan) { … } static void fsl_edma_enable_request(struct fsl_edma_chan *fsl_chan) { … } static void fsl_edma3_disable_request(struct fsl_edma_chan *fsl_chan) { … } void fsl_edma_disable_request(struct fsl_edma_chan *fsl_chan) { … } static void mux_configure8(struct fsl_edma_chan *fsl_chan, void __iomem *addr, u32 off, u32 slot, bool enable) { … } static void mux_configure32(struct fsl_edma_chan *fsl_chan, void __iomem *addr, u32 off, u32 slot, bool enable) { … } void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan, unsigned int slot, bool enable) { … } static unsigned int fsl_edma_get_tcd_attr(enum dma_slave_buswidth addr_width) { … } void fsl_edma_free_desc(struct virt_dma_desc *vdesc) { … } int fsl_edma_terminate_all(struct dma_chan *chan) { … } int fsl_edma_pause(struct dma_chan *chan) { … } int fsl_edma_resume(struct dma_chan *chan) { … } static void fsl_edma_unprep_slave_dma(struct fsl_edma_chan *fsl_chan) { … } static bool fsl_edma_prep_slave_dma(struct fsl_edma_chan *fsl_chan, enum dma_transfer_direction dir) { … } int fsl_edma_slave_config(struct dma_chan *chan, struct dma_slave_config *cfg) { … } static size_t fsl_edma_desc_residue(struct fsl_edma_chan *fsl_chan, struct virt_dma_desc *vdesc, bool in_progress) { … } enum dma_status fsl_edma_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate) { … } static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan, void *tcd) { … } static inline void fsl_edma_fill_tcd(struct fsl_edma_chan *fsl_chan, struct fsl_edma_hw_tcd *tcd, dma_addr_t src, dma_addr_t dst, u16 attr, u16 soff, u32 nbytes, dma_addr_t slast, u16 citer, u16 biter, u16 doff, dma_addr_t dlast_sga, bool major_int, bool disable_req, bool enable_sg) { … } static struct fsl_edma_desc *fsl_edma_alloc_desc(struct fsl_edma_chan *fsl_chan, int sg_len) { … } struct dma_async_tx_descriptor *fsl_edma_prep_dma_cyclic( struct dma_chan *chan, dma_addr_t dma_addr, size_t buf_len, size_t period_len, enum dma_transfer_direction direction, unsigned long flags) { … } struct dma_async_tx_descriptor *fsl_edma_prep_slave_sg( struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction direction, unsigned long flags, void *context) { … } struct dma_async_tx_descriptor *fsl_edma_prep_memcpy(struct dma_chan *chan, dma_addr_t dma_dst, dma_addr_t dma_src, size_t len, unsigned long flags) { … } void fsl_edma_xfer_desc(struct fsl_edma_chan *fsl_chan) { … } void fsl_edma_issue_pending(struct dma_chan *chan) { … } int fsl_edma_alloc_chan_resources(struct dma_chan *chan) { … } void fsl_edma_free_chan_resources(struct dma_chan *chan) { … } void fsl_edma_cleanup_vchan(struct dma_device *dmadev) { … } /* * On the 32 channels Vybrid/mpc577x edma version, register offsets are * different compared to ColdFire mcf5441x 64 channels edma. * * This function sets up register offsets as per proper declared version * so must be called in xxx_edma_probe() just after setting the * edma "version" and "membase" appropriately. */ void fsl_edma_setup_regs(struct fsl_edma_engine *edma) { … } MODULE_LICENSE(…) …;
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