// SPDX-License-Identifier: GPL-2.0-only /* * IMG Multi-threaded DMA Controller (MDC) * * Copyright (C) 2009,2012,2013 Imagination Technologies Ltd. * Copyright (C) 2014 Google, Inc. */ #include <linux/clk.h> #include <linux/dma-mapping.h> #include <linux/dmaengine.h> #include <linux/dmapool.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/irq.h> #include <linux/kernel.h> #include <linux/mfd/syscon.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_dma.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/regmap.h> #include <linux/slab.h> #include <linux/spinlock.h> #include "dmaengine.h" #include "virt-dma.h" #define MDC_MAX_DMA_CHANNELS … #define MDC_GENERAL_CONFIG … #define MDC_GENERAL_CONFIG_LIST_IEN … #define MDC_GENERAL_CONFIG_IEN … #define MDC_GENERAL_CONFIG_LEVEL_INT … #define MDC_GENERAL_CONFIG_INC_W … #define MDC_GENERAL_CONFIG_INC_R … #define MDC_GENERAL_CONFIG_PHYSICAL_W … #define MDC_GENERAL_CONFIG_WIDTH_W_SHIFT … #define MDC_GENERAL_CONFIG_WIDTH_W_MASK … #define MDC_GENERAL_CONFIG_PHYSICAL_R … #define MDC_GENERAL_CONFIG_WIDTH_R_SHIFT … #define MDC_GENERAL_CONFIG_WIDTH_R_MASK … #define MDC_READ_PORT_CONFIG … #define MDC_READ_PORT_CONFIG_STHREAD_SHIFT … #define MDC_READ_PORT_CONFIG_STHREAD_MASK … #define MDC_READ_PORT_CONFIG_RTHREAD_SHIFT … #define MDC_READ_PORT_CONFIG_RTHREAD_MASK … #define MDC_READ_PORT_CONFIG_WTHREAD_SHIFT … #define MDC_READ_PORT_CONFIG_WTHREAD_MASK … #define MDC_READ_PORT_CONFIG_BURST_SIZE_SHIFT … #define MDC_READ_PORT_CONFIG_BURST_SIZE_MASK … #define MDC_READ_PORT_CONFIG_DREQ_ENABLE … #define MDC_READ_ADDRESS … #define MDC_WRITE_ADDRESS … #define MDC_TRANSFER_SIZE … #define MDC_TRANSFER_SIZE_MASK … #define MDC_LIST_NODE_ADDRESS … #define MDC_CMDS_PROCESSED … #define MDC_CMDS_PROCESSED_CMDS_PROCESSED_SHIFT … #define MDC_CMDS_PROCESSED_CMDS_PROCESSED_MASK … #define MDC_CMDS_PROCESSED_INT_ACTIVE … #define MDC_CMDS_PROCESSED_CMDS_DONE_SHIFT … #define MDC_CMDS_PROCESSED_CMDS_DONE_MASK … #define MDC_CONTROL_AND_STATUS … #define MDC_CONTROL_AND_STATUS_CANCEL … #define MDC_CONTROL_AND_STATUS_LIST_EN … #define MDC_CONTROL_AND_STATUS_EN … #define MDC_ACTIVE_TRANSFER_SIZE … #define MDC_GLOBAL_CONFIG_A … #define MDC_GLOBAL_CONFIG_A_THREAD_ID_WIDTH_SHIFT … #define MDC_GLOBAL_CONFIG_A_THREAD_ID_WIDTH_MASK … #define MDC_GLOBAL_CONFIG_A_DMA_CONTEXTS_SHIFT … #define MDC_GLOBAL_CONFIG_A_DMA_CONTEXTS_MASK … #define MDC_GLOBAL_CONFIG_A_SYS_DAT_WIDTH_SHIFT … #define MDC_GLOBAL_CONFIG_A_SYS_DAT_WIDTH_MASK … struct mdc_hw_list_desc { … }; struct mdc_tx_desc { … }; struct mdc_chan { … }; struct mdc_dma_soc_data { … }; struct mdc_dma { … }; static inline u32 mdc_readl(struct mdc_dma *mdma, u32 reg) { … } static inline void mdc_writel(struct mdc_dma *mdma, u32 val, u32 reg) { … } static inline u32 mdc_chan_readl(struct mdc_chan *mchan, u32 reg) { … } static inline void mdc_chan_writel(struct mdc_chan *mchan, u32 val, u32 reg) { … } static inline struct mdc_chan *to_mdc_chan(struct dma_chan *c) { … } static inline struct mdc_tx_desc *to_mdc_desc(struct dma_async_tx_descriptor *t) { … } static inline struct device *mdma2dev(struct mdc_dma *mdma) { … } static inline unsigned int to_mdc_width(unsigned int bytes) { … } static inline void mdc_set_read_width(struct mdc_hw_list_desc *ldesc, unsigned int bytes) { … } static inline void mdc_set_write_width(struct mdc_hw_list_desc *ldesc, unsigned int bytes) { … } static void mdc_list_desc_config(struct mdc_chan *mchan, struct mdc_hw_list_desc *ldesc, enum dma_transfer_direction dir, dma_addr_t src, dma_addr_t dst, size_t len) { … } static void mdc_list_desc_free(struct mdc_tx_desc *mdesc) { … } static void mdc_desc_free(struct virt_dma_desc *vd) { … } static struct dma_async_tx_descriptor *mdc_prep_dma_memcpy( struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, size_t len, unsigned long flags) { … } static int mdc_check_slave_width(struct mdc_chan *mchan, enum dma_transfer_direction dir) { … } static struct dma_async_tx_descriptor *mdc_prep_dma_cyclic( struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, size_t period_len, enum dma_transfer_direction dir, unsigned long flags) { … } static struct dma_async_tx_descriptor *mdc_prep_slave_sg( struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction dir, unsigned long flags, void *context) { … } static void mdc_issue_desc(struct mdc_chan *mchan) { … } static void mdc_issue_pending(struct dma_chan *chan) { … } static enum dma_status mdc_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate) { … } static unsigned int mdc_get_new_events(struct mdc_chan *mchan) { … } static int mdc_terminate_all(struct dma_chan *chan) { … } static void mdc_synchronize(struct dma_chan *chan) { … } static int mdc_slave_config(struct dma_chan *chan, struct dma_slave_config *config) { … } static int mdc_alloc_chan_resources(struct dma_chan *chan) { … } static void mdc_free_chan_resources(struct dma_chan *chan) { … } static irqreturn_t mdc_chan_irq(int irq, void *dev_id) { … } static struct dma_chan *mdc_of_xlate(struct of_phandle_args *dma_spec, struct of_dma *ofdma) { … } #define PISTACHIO_CR_PERIPH_DMA_ROUTE(ch) … #define PISTACHIO_CR_PERIPH_DMA_ROUTE_SHIFT(ch) … #define PISTACHIO_CR_PERIPH_DMA_ROUTE_MASK … static void pistachio_mdc_enable_chan(struct mdc_chan *mchan) { … } static void pistachio_mdc_disable_chan(struct mdc_chan *mchan) { … } static const struct mdc_dma_soc_data pistachio_mdc_data = …; static const struct of_device_id mdc_dma_of_match[] = …; MODULE_DEVICE_TABLE(of, mdc_dma_of_match); static int img_mdc_runtime_suspend(struct device *dev) { … } static int img_mdc_runtime_resume(struct device *dev) { … } static int mdc_dma_probe(struct platform_device *pdev) { … } static void mdc_dma_remove(struct platform_device *pdev) { … } #ifdef CONFIG_PM_SLEEP static int img_mdc_suspend_late(struct device *dev) { … } static int img_mdc_resume_early(struct device *dev) { … } #endif /* CONFIG_PM_SLEEP */ static const struct dev_pm_ops img_mdc_pm_ops = …; static struct platform_driver mdc_dma_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …;
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