// SPDX-License-Identifier: GPL-2.0 // // Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. // // Refer to drivers/dma/imx-sdma.c #include <linux/init.h> #include <linux/types.h> #include <linux/mm.h> #include <linux/interrupt.h> #include <linux/clk.h> #include <linux/wait.h> #include <linux/sched.h> #include <linux/semaphore.h> #include <linux/device.h> #include <linux/dma-mapping.h> #include <linux/slab.h> #include <linux/platform_device.h> #include <linux/dmaengine.h> #include <linux/delay.h> #include <linux/module.h> #include <linux/stmp_device.h> #include <linux/of.h> #include <linux/of_dma.h> #include <linux/list.h> #include <linux/dma/mxs-dma.h> #include <asm/irq.h> #include "dmaengine.h" /* * NOTE: The term "PIO" throughout the mxs-dma implementation means * PIO mode of mxs apbh-dma and apbx-dma. With this working mode, * dma can program the controller registers of peripheral devices. */ #define dma_is_apbh(mxs_dma) … #define apbh_is_old(mxs_dma) … #define HW_APBHX_CTRL0 … #define BM_APBH_CTRL0_APB_BURST8_EN … #define BM_APBH_CTRL0_APB_BURST_EN … #define BP_APBH_CTRL0_RESET_CHANNEL … #define HW_APBHX_CTRL1 … #define HW_APBHX_CTRL2 … #define HW_APBHX_CHANNEL_CTRL … #define BP_APBHX_CHANNEL_CTRL_RESET_CHANNEL … /* * The offset of NXTCMDAR register is different per both dma type and version, * while stride for each channel is all the same 0x70. */ #define HW_APBHX_CHn_NXTCMDAR(d, n) … #define HW_APBHX_CHn_SEMA(d, n) … #define HW_APBHX_CHn_BAR(d, n) … #define HW_APBX_CHn_DEBUG1(d, n) … /* * ccw bits definitions * * COMMAND: 0..1 (2) * CHAIN: 2 (1) * IRQ: 3 (1) * NAND_LOCK: 4 (1) - not implemented * NAND_WAIT4READY: 5 (1) - not implemented * DEC_SEM: 6 (1) * WAIT4END: 7 (1) * HALT_ON_TERMINATE: 8 (1) * TERMINATE_FLUSH: 9 (1) * RESERVED: 10..11 (2) * PIO_NUM: 12..15 (4) */ #define BP_CCW_COMMAND … #define BM_CCW_COMMAND … #define CCW_CHAIN … #define CCW_IRQ … #define CCW_WAIT4RDY … #define CCW_DEC_SEM … #define CCW_WAIT4END … #define CCW_HALT_ON_TERM … #define CCW_TERM_FLUSH … #define BP_CCW_PIO_NUM … #define BM_CCW_PIO_NUM … #define BF_CCW(value, field) … #define MXS_DMA_CMD_NO_XFER … #define MXS_DMA_CMD_WRITE … #define MXS_DMA_CMD_READ … #define MXS_DMA_CMD_DMA_SENSE … struct mxs_dma_ccw { … }; #define CCW_BLOCK_SIZE … #define NUM_CCW … struct mxs_dma_chan { … }; #define MXS_DMA_CHANNELS … #define MXS_DMA_CHANNELS_MASK … enum mxs_dma_devtype { … }; enum mxs_dma_id { … }; struct mxs_dma_engine { … }; struct mxs_dma_type { … }; static struct mxs_dma_type mxs_dma_types[] = …; static const struct of_device_id mxs_dma_dt_ids[] = …; MODULE_DEVICE_TABLE(of, mxs_dma_dt_ids); static struct mxs_dma_chan *to_mxs_dma_chan(struct dma_chan *chan) { … } static void mxs_dma_reset_chan(struct dma_chan *chan) { … } static void mxs_dma_enable_chan(struct dma_chan *chan) { … } static void mxs_dma_disable_chan(struct dma_chan *chan) { … } static int mxs_dma_pause_chan(struct dma_chan *chan) { … } static int mxs_dma_resume_chan(struct dma_chan *chan) { … } static dma_cookie_t mxs_dma_tx_submit(struct dma_async_tx_descriptor *tx) { … } static void mxs_dma_tasklet(struct tasklet_struct *t) { … } static int mxs_dma_irq_to_chan(struct mxs_dma_engine *mxs_dma, int irq) { … } static irqreturn_t mxs_dma_int_handler(int irq, void *dev_id) { … } static int mxs_dma_alloc_chan_resources(struct dma_chan *chan) { … } static void mxs_dma_free_chan_resources(struct dma_chan *chan) { … } /* * How to use the flags for ->device_prep_slave_sg() : * [1] If there is only one DMA command in the DMA chain, the code should be: * ...... * ->device_prep_slave_sg(DMA_CTRL_ACK); * ...... * [2] If there are two DMA commands in the DMA chain, the code should be * ...... * ->device_prep_slave_sg(0); * ...... * ->device_prep_slave_sg(DMA_CTRL_ACK); * ...... * [3] If there are more than two DMA commands in the DMA chain, the code * should be: * ...... * ->device_prep_slave_sg(0); // First * ...... * ->device_prep_slave_sg(DMA_CTRL_ACK]); * ...... * ->device_prep_slave_sg(DMA_CTRL_ACK); // Last * ...... */ static struct dma_async_tx_descriptor *mxs_dma_prep_slave_sg( struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction direction, unsigned long flags, void *context) { … } static struct dma_async_tx_descriptor *mxs_dma_prep_dma_cyclic( struct dma_chan *chan, dma_addr_t dma_addr, size_t buf_len, size_t period_len, enum dma_transfer_direction direction, unsigned long flags) { … } static int mxs_dma_terminate_all(struct dma_chan *chan) { … } static enum dma_status mxs_dma_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate) { … } static int mxs_dma_init(struct mxs_dma_engine *mxs_dma) { … } struct mxs_dma_filter_param { … }; static bool mxs_dma_filter_fn(struct dma_chan *chan, void *fn_param) { … } static struct dma_chan *mxs_dma_xlate(struct of_phandle_args *dma_spec, struct of_dma *ofdma) { … } static int mxs_dma_probe(struct platform_device *pdev) { … } static struct platform_driver mxs_dma_driver = …; builtin_platform_driver(…) …;
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