linux/drivers/dma/plx_dma.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Microsemi Switchtec(tm) PCIe Management Driver
 * Copyright (c) 2019, Logan Gunthorpe <[email protected]>
 * Copyright (c) 2019, GigaIO Networks, Inc
 */

#include "dmaengine.h"

#include <linux/circ_buf.h>
#include <linux/dmaengine.h>
#include <linux/kref.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/pci.h>

MODULE_DESCRIPTION();
MODULE_VERSION();
MODULE_LICENSE();
MODULE_AUTHOR();

#define PLX_REG_DESC_RING_ADDR
#define PLX_REG_DESC_RING_ADDR_HI
#define PLX_REG_DESC_RING_NEXT_ADDR
#define PLX_REG_DESC_RING_COUNT
#define PLX_REG_DESC_RING_LAST_ADDR
#define PLX_REG_DESC_RING_LAST_SIZE
#define PLX_REG_PREF_LIMIT
#define PLX_REG_CTRL
#define PLX_REG_CTRL2
#define PLX_REG_INTR_CTRL
#define PLX_REG_INTR_STATUS

#define PLX_REG_PREF_LIMIT_PREF_FOUR

#define PLX_REG_CTRL_GRACEFUL_PAUSE
#define PLX_REG_CTRL_ABORT
#define PLX_REG_CTRL_WRITE_BACK_EN
#define PLX_REG_CTRL_START
#define PLX_REG_CTRL_RING_STOP_MODE
#define PLX_REG_CTRL_DESC_MODE_BLOCK
#define PLX_REG_CTRL_DESC_MODE_ON_CHIP
#define PLX_REG_CTRL_DESC_MODE_OFF_CHIP
#define PLX_REG_CTRL_DESC_INVALID
#define PLX_REG_CTRL_GRACEFUL_PAUSE_DONE
#define PLX_REG_CTRL_ABORT_DONE
#define PLX_REG_CTRL_IMM_PAUSE_DONE
#define PLX_REG_CTRL_IN_PROGRESS

#define PLX_REG_CTRL_RESET_VAL

#define PLX_REG_CTRL_START_VAL

#define PLX_REG_CTRL2_MAX_TXFR_SIZE_64B
#define PLX_REG_CTRL2_MAX_TXFR_SIZE_128B
#define PLX_REG_CTRL2_MAX_TXFR_SIZE_256B
#define PLX_REG_CTRL2_MAX_TXFR_SIZE_512B
#define PLX_REG_CTRL2_MAX_TXFR_SIZE_1KB
#define PLX_REG_CTRL2_MAX_TXFR_SIZE_2KB
#define PLX_REG_CTRL2_MAX_TXFR_SIZE_4B

#define PLX_REG_INTR_CRTL_ERROR_EN
#define PLX_REG_INTR_CRTL_INV_DESC_EN
#define PLX_REG_INTR_CRTL_ABORT_DONE_EN
#define PLX_REG_INTR_CRTL_PAUSE_DONE_EN
#define PLX_REG_INTR_CRTL_IMM_PAUSE_DONE_EN

#define PLX_REG_INTR_STATUS_ERROR
#define PLX_REG_INTR_STATUS_INV_DESC
#define PLX_REG_INTR_STATUS_DESC_DONE
#define PLX_REG_INTR_CRTL_ABORT_DONE

struct plx_dma_hw_std_desc {};

#define PLX_DESC_SIZE_MASK
#define PLX_DESC_FLAG_VALID
#define PLX_DESC_FLAG_INT_WHEN_DONE

#define PLX_DESC_WB_SUCCESS
#define PLX_DESC_WB_RD_FAIL
#define PLX_DESC_WB_WR_FAIL

#define PLX_DMA_RING_COUNT

struct plx_dma_desc {};

struct plx_dma_dev {};

static struct plx_dma_dev *chan_to_plx_dma_dev(struct dma_chan *c)
{}

static struct plx_dma_desc *to_plx_desc(struct dma_async_tx_descriptor *txd)
{}

static struct plx_dma_desc *plx_dma_get_desc(struct plx_dma_dev *plxdev, int i)
{}

static void plx_dma_process_desc(struct plx_dma_dev *plxdev)
{}

static void plx_dma_abort_desc(struct plx_dma_dev *plxdev)
{}

static void __plx_dma_stop(struct plx_dma_dev *plxdev)
{}

static void plx_dma_stop(struct plx_dma_dev *plxdev)
{}

static void plx_dma_desc_task(struct tasklet_struct *t)
{}

static struct dma_async_tx_descriptor *plx_dma_prep_memcpy(struct dma_chan *c,
		dma_addr_t dma_dst, dma_addr_t dma_src, size_t len,
		unsigned long flags)
	__acquires(plxdev->ring_lock)
{}

static dma_cookie_t plx_dma_tx_submit(struct dma_async_tx_descriptor *desc)
	__releases(plxdev->ring_lock)
{}

static enum dma_status plx_dma_tx_status(struct dma_chan *chan,
		dma_cookie_t cookie, struct dma_tx_state *txstate)
{}

static void plx_dma_issue_pending(struct dma_chan *chan)
{}

static irqreturn_t plx_dma_isr(int irq, void *devid)
{}

static int plx_dma_alloc_desc(struct plx_dma_dev *plxdev)
{}

static int plx_dma_alloc_chan_resources(struct dma_chan *chan)
{}

static void plx_dma_free_chan_resources(struct dma_chan *chan)
{}

static void plx_dma_release(struct dma_device *dma_dev)
{}

static int plx_dma_create(struct pci_dev *pdev)
{}

static int plx_dma_probe(struct pci_dev *pdev,
			 const struct pci_device_id *id)
{}

static void plx_dma_remove(struct pci_dev *pdev)
{}

static const struct pci_device_id plx_dma_pci_tbl[] =;
MODULE_DEVICE_TABLE(pci, plx_dma_pci_tbl);

static struct pci_driver plx_dma_pci_driver =;
module_pci_driver();