// SPDX-License-Identifier: GPL-2.0-only /* * Topcliff PCH DMA controller driver * Copyright (c) 2010 Intel Corporation * Copyright (C) 2011 LAPIS Semiconductor Co., Ltd. */ #include <linux/dmaengine.h> #include <linux/dma-mapping.h> #include <linux/init.h> #include <linux/pci.h> #include <linux/slab.h> #include <linux/interrupt.h> #include <linux/module.h> #include <linux/pch_dma.h> #include "dmaengine.h" #define DRV_NAME … #define DMA_CTL0_DISABLE … #define DMA_CTL0_SG … #define DMA_CTL0_ONESHOT … #define DMA_CTL0_MODE_MASK_BITS … #define DMA_CTL0_DIR_SHIFT_BITS … #define DMA_CTL0_BITS_PER_CH … #define DMA_CTL2_START_SHIFT_BITS … #define DMA_CTL2_IRQ_ENABLE_MASK … #define DMA_STATUS_IDLE … #define DMA_STATUS_DESC_READ … #define DMA_STATUS_WAIT … #define DMA_STATUS_ACCESS … #define DMA_STATUS_BITS_PER_CH … #define DMA_STATUS_MASK_BITS … #define DMA_STATUS_SHIFT_BITS … #define DMA_STATUS_IRQ(x) … #define DMA_STATUS0_ERR(x) … #define DMA_STATUS2_ERR(x) … #define DMA_DESC_WIDTH_SHIFT_BITS … #define DMA_DESC_WIDTH_1_BYTE … #define DMA_DESC_WIDTH_2_BYTES … #define DMA_DESC_WIDTH_4_BYTES … #define DMA_DESC_MAX_COUNT_1_BYTE … #define DMA_DESC_MAX_COUNT_2_BYTES … #define DMA_DESC_MAX_COUNT_4_BYTES … #define DMA_DESC_END_WITHOUT_IRQ … #define DMA_DESC_END_WITH_IRQ … #define DMA_DESC_FOLLOW_WITHOUT_IRQ … #define DMA_DESC_FOLLOW_WITH_IRQ … #define MAX_CHAN_NR … #define DMA_MASK_CTL0_MODE … #define DMA_MASK_CTL2_MODE … static unsigned int init_nr_desc_per_channel = …; module_param(init_nr_desc_per_channel, uint, 0644); MODULE_PARM_DESC(…) …; struct pch_dma_desc_regs { … }; struct pch_dma_regs { … }; struct pch_dma_desc { … }; struct pch_dma_chan { … }; #define PDC_DEV_ADDR … #define PDC_MEM_ADDR … #define PDC_SIZE … #define PDC_NEXT … #define channel_readl(pdc, name) … #define channel_writel(pdc, name, val) … struct pch_dma { … }; #define PCH_DMA_CTL0 … #define PCH_DMA_CTL1 … #define PCH_DMA_CTL2 … #define PCH_DMA_CTL3 … #define PCH_DMA_STS0 … #define PCH_DMA_STS1 … #define PCH_DMA_STS2 … #define dma_readl(pd, name) … #define dma_writel(pd, name, val) … static inline struct pch_dma_desc *to_pd_desc(struct dma_async_tx_descriptor *txd) { … } static inline struct pch_dma_chan *to_pd_chan(struct dma_chan *chan) { … } static inline struct pch_dma *to_pd(struct dma_device *ddev) { … } static inline struct device *chan2dev(struct dma_chan *chan) { … } static inline struct pch_dma_desc *pdc_first_active(struct pch_dma_chan *pd_chan) { … } static inline struct pch_dma_desc *pdc_first_queued(struct pch_dma_chan *pd_chan) { … } static void pdc_enable_irq(struct dma_chan *chan, int enable) { … } static void pdc_set_dir(struct dma_chan *chan) { … } static void pdc_set_mode(struct dma_chan *chan, u32 mode) { … } static u32 pdc_get_status0(struct pch_dma_chan *pd_chan) { … } static u32 pdc_get_status2(struct pch_dma_chan *pd_chan) { … } static bool pdc_is_idle(struct pch_dma_chan *pd_chan) { … } static void pdc_dostart(struct pch_dma_chan *pd_chan, struct pch_dma_desc* desc) { … } static void pdc_chain_complete(struct pch_dma_chan *pd_chan, struct pch_dma_desc *desc) { … } static void pdc_complete_all(struct pch_dma_chan *pd_chan) { … } static void pdc_handle_error(struct pch_dma_chan *pd_chan) { … } static void pdc_advance_work(struct pch_dma_chan *pd_chan) { … } static dma_cookie_t pd_tx_submit(struct dma_async_tx_descriptor *txd) { … } static struct pch_dma_desc *pdc_alloc_desc(struct dma_chan *chan, gfp_t flags) { … } static struct pch_dma_desc *pdc_desc_get(struct pch_dma_chan *pd_chan) { … } static void pdc_desc_put(struct pch_dma_chan *pd_chan, struct pch_dma_desc *desc) { … } static int pd_alloc_chan_resources(struct dma_chan *chan) { … } static void pd_free_chan_resources(struct dma_chan *chan) { … } static enum dma_status pd_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate) { … } static void pd_issue_pending(struct dma_chan *chan) { … } static struct dma_async_tx_descriptor *pd_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, enum dma_transfer_direction direction, unsigned long flags, void *context) { … } static int pd_device_terminate_all(struct dma_chan *chan) { … } static void pdc_tasklet(struct tasklet_struct *t) { … } static irqreturn_t pd_irq(int irq, void *devid) { … } static void __maybe_unused pch_dma_save_regs(struct pch_dma *pd) { … } static void __maybe_unused pch_dma_restore_regs(struct pch_dma *pd) { … } static int __maybe_unused pch_dma_suspend(struct device *dev) { … } static int __maybe_unused pch_dma_resume(struct device *dev) { … } static int pch_dma_probe(struct pci_dev *pdev, const struct pci_device_id *id) { … } static void pch_dma_remove(struct pci_dev *pdev) { … } /* PCI Device ID of DMA device */ #define PCI_DEVICE_ID_EG20T_PCH_DMA_8CH … #define PCI_DEVICE_ID_EG20T_PCH_DMA_4CH … #define PCI_DEVICE_ID_ML7213_DMA1_8CH … #define PCI_DEVICE_ID_ML7213_DMA2_8CH … #define PCI_DEVICE_ID_ML7213_DMA3_4CH … #define PCI_DEVICE_ID_ML7213_DMA4_12CH … #define PCI_DEVICE_ID_ML7223_DMA1_4CH … #define PCI_DEVICE_ID_ML7223_DMA2_4CH … #define PCI_DEVICE_ID_ML7223_DMA3_4CH … #define PCI_DEVICE_ID_ML7223_DMA4_4CH … #define PCI_DEVICE_ID_ML7831_DMA1_8CH … #define PCI_DEVICE_ID_ML7831_DMA2_4CH … static const struct pci_device_id pch_dma_id_table[] = …; static SIMPLE_DEV_PM_OPS(pch_dma_pm_ops, pch_dma_suspend, pch_dma_resume); static struct pci_driver pch_dma_driver = …; module_pci_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …; MODULE_DEVICE_TABLE(pci, pch_dma_id_table);
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