/* * Copyright (C) 2017 Spreadtrum Communications Inc. * * SPDX-License-Identifier: GPL-2.0 */ #include <linux/clk.h> #include <linux/dma-mapping.h> #include <linux/dma/sprd-dma.h> #include <linux/errno.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_dma.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/slab.h> #include "virt-dma.h" #define SPRD_DMA_CHN_REG_OFFSET … #define SPRD_DMA_CHN_REG_LENGTH … #define SPRD_DMA_MEMCPY_MIN_SIZE … /* DMA global registers definition */ #define SPRD_DMA_GLB_PAUSE … #define SPRD_DMA_GLB_FRAG_WAIT … #define SPRD_DMA_GLB_REQ_PEND0_EN … #define SPRD_DMA_GLB_REQ_PEND1_EN … #define SPRD_DMA_GLB_INT_RAW_STS … #define SPRD_DMA_GLB_INT_MSK_STS … #define SPRD_DMA_GLB_REQ_STS … #define SPRD_DMA_GLB_CHN_EN_STS … #define SPRD_DMA_GLB_DEBUG_STS … #define SPRD_DMA_GLB_ARB_SEL_STS … #define SPRD_DMA_GLB_2STAGE_GRP1 … #define SPRD_DMA_GLB_2STAGE_GRP2 … #define SPRD_DMA_GLB_REQ_UID(uid) … #define SPRD_DMA_GLB_REQ_UID_OFFSET … /* DMA channel registers definition */ #define SPRD_DMA_CHN_PAUSE … #define SPRD_DMA_CHN_REQ … #define SPRD_DMA_CHN_CFG … #define SPRD_DMA_CHN_INTC … #define SPRD_DMA_CHN_SRC_ADDR … #define SPRD_DMA_CHN_DES_ADDR … #define SPRD_DMA_CHN_FRG_LEN … #define SPRD_DMA_CHN_BLK_LEN … #define SPRD_DMA_CHN_TRSC_LEN … #define SPRD_DMA_CHN_TRSF_STEP … #define SPRD_DMA_CHN_WARP_PTR … #define SPRD_DMA_CHN_WARP_TO … #define SPRD_DMA_CHN_LLIST_PTR … #define SPRD_DMA_CHN_FRAG_STEP … #define SPRD_DMA_CHN_SRC_BLK_STEP … #define SPRD_DMA_CHN_DES_BLK_STEP … /* SPRD_DMA_GLB_2STAGE_GRP register definition */ #define SPRD_DMA_GLB_2STAGE_EN … #define SPRD_DMA_GLB_CHN_INT_MASK … #define SPRD_DMA_GLB_DEST_INT … #define SPRD_DMA_GLB_SRC_INT … #define SPRD_DMA_GLB_LIST_DONE_TRG … #define SPRD_DMA_GLB_TRANS_DONE_TRG … #define SPRD_DMA_GLB_BLOCK_DONE_TRG … #define SPRD_DMA_GLB_FRAG_DONE_TRG … #define SPRD_DMA_GLB_TRG_OFFSET … #define SPRD_DMA_GLB_DEST_CHN_MASK … #define SPRD_DMA_GLB_DEST_CHN_OFFSET … #define SPRD_DMA_GLB_SRC_CHN_MASK … /* SPRD_DMA_CHN_INTC register definition */ #define SPRD_DMA_INT_MASK … #define SPRD_DMA_INT_CLR_OFFSET … #define SPRD_DMA_FRAG_INT_EN … #define SPRD_DMA_BLK_INT_EN … #define SPRD_DMA_TRANS_INT_EN … #define SPRD_DMA_LIST_INT_EN … #define SPRD_DMA_CFG_ERR_INT_EN … /* SPRD_DMA_CHN_CFG register definition */ #define SPRD_DMA_CHN_EN … #define SPRD_DMA_LINKLIST_EN … #define SPRD_DMA_WAIT_BDONE_OFFSET … #define SPRD_DMA_DONOT_WAIT_BDONE … /* SPRD_DMA_CHN_REQ register definition */ #define SPRD_DMA_REQ_EN … /* SPRD_DMA_CHN_PAUSE register definition */ #define SPRD_DMA_PAUSE_EN … #define SPRD_DMA_PAUSE_STS … #define SPRD_DMA_PAUSE_CNT … /* DMA_CHN_WARP_* register definition */ #define SPRD_DMA_HIGH_ADDR_MASK … #define SPRD_DMA_LOW_ADDR_MASK … #define SPRD_DMA_WRAP_ADDR_MASK … #define SPRD_DMA_HIGH_ADDR_OFFSET … /* SPRD_DMA_CHN_INTC register definition */ #define SPRD_DMA_FRAG_INT_STS … #define SPRD_DMA_BLK_INT_STS … #define SPRD_DMA_TRSC_INT_STS … #define SPRD_DMA_LIST_INT_STS … #define SPRD_DMA_CFGERR_INT_STS … #define SPRD_DMA_CHN_INT_STS … /* SPRD_DMA_CHN_FRG_LEN register definition */ #define SPRD_DMA_SRC_DATAWIDTH_OFFSET … #define SPRD_DMA_DES_DATAWIDTH_OFFSET … #define SPRD_DMA_SWT_MODE_OFFSET … #define SPRD_DMA_REQ_MODE_OFFSET … #define SPRD_DMA_REQ_MODE_MASK … #define SPRD_DMA_WRAP_SEL_DEST … #define SPRD_DMA_WRAP_EN … #define SPRD_DMA_FIX_SEL_OFFSET … #define SPRD_DMA_FIX_EN_OFFSET … #define SPRD_DMA_LLIST_END … #define SPRD_DMA_FRG_LEN_MASK … /* SPRD_DMA_CHN_BLK_LEN register definition */ #define SPRD_DMA_BLK_LEN_MASK … /* SPRD_DMA_CHN_TRSC_LEN register definition */ #define SPRD_DMA_TRSC_LEN_MASK … /* SPRD_DMA_CHN_TRSF_STEP register definition */ #define SPRD_DMA_DEST_TRSF_STEP_OFFSET … #define SPRD_DMA_SRC_TRSF_STEP_OFFSET … #define SPRD_DMA_TRSF_STEP_MASK … /* SPRD DMA_SRC_BLK_STEP register definition */ #define SPRD_DMA_LLIST_HIGH_MASK … #define SPRD_DMA_LLIST_HIGH_SHIFT … /* define DMA channel mode & trigger mode mask */ #define SPRD_DMA_CHN_MODE_MASK … #define SPRD_DMA_TRG_MODE_MASK … #define SPRD_DMA_INT_TYPE_MASK … /* define the DMA transfer step type */ #define SPRD_DMA_NONE_STEP … #define SPRD_DMA_BYTE_STEP … #define SPRD_DMA_SHORT_STEP … #define SPRD_DMA_WORD_STEP … #define SPRD_DMA_DWORD_STEP … #define SPRD_DMA_SOFTWARE_UID … /* dma data width values */ enum sprd_dma_datawidth { … }; /* dma channel hardware configuration */ struct sprd_dma_chn_hw { … }; /* dma request description */ struct sprd_dma_desc { … }; /* dma channel description */ struct sprd_dma_chn { … }; /* SPRD dma device */ struct sprd_dma_dev { … }; static void sprd_dma_free_desc(struct virt_dma_desc *vd); static bool sprd_dma_filter_fn(struct dma_chan *chan, void *param); static struct of_dma_filter_info sprd_dma_info = …; static inline struct sprd_dma_chn *to_sprd_dma_chan(struct dma_chan *c) { … } static inline struct sprd_dma_dev *to_sprd_dma_dev(struct dma_chan *c) { … } static inline struct sprd_dma_desc *to_sprd_dma_desc(struct virt_dma_desc *vd) { … } static void sprd_dma_glb_update(struct sprd_dma_dev *sdev, u32 reg, u32 mask, u32 val) { … } static void sprd_dma_chn_update(struct sprd_dma_chn *schan, u32 reg, u32 mask, u32 val) { … } static int sprd_dma_enable(struct sprd_dma_dev *sdev) { … } static void sprd_dma_disable(struct sprd_dma_dev *sdev) { … } static void sprd_dma_set_uid(struct sprd_dma_chn *schan) { … } static void sprd_dma_unset_uid(struct sprd_dma_chn *schan) { … } static void sprd_dma_clear_int(struct sprd_dma_chn *schan) { … } static void sprd_dma_enable_chn(struct sprd_dma_chn *schan) { … } static void sprd_dma_disable_chn(struct sprd_dma_chn *schan) { … } static void sprd_dma_soft_request(struct sprd_dma_chn *schan) { … } static void sprd_dma_pause_resume(struct sprd_dma_chn *schan, bool enable) { … } static void sprd_dma_stop_and_disable(struct sprd_dma_chn *schan) { … } static unsigned long sprd_dma_get_src_addr(struct sprd_dma_chn *schan) { … } static unsigned long sprd_dma_get_dst_addr(struct sprd_dma_chn *schan) { … } static enum sprd_dma_int_type sprd_dma_get_int_type(struct sprd_dma_chn *schan) { … } static enum sprd_dma_req_mode sprd_dma_get_req_type(struct sprd_dma_chn *schan) { … } static int sprd_dma_set_2stage_config(struct sprd_dma_chn *schan) { … } static void sprd_dma_set_pending(struct sprd_dma_chn *schan, bool enable) { … } static void sprd_dma_set_chn_config(struct sprd_dma_chn *schan, struct sprd_dma_desc *sdesc) { … } static void sprd_dma_start(struct sprd_dma_chn *schan) { … } static void sprd_dma_stop(struct sprd_dma_chn *schan) { … } static bool sprd_dma_check_trans_done(enum sprd_dma_int_type int_type, enum sprd_dma_req_mode req_mode) { … } static irqreturn_t dma_irq_handle(int irq, void *dev_id) { … } static int sprd_dma_alloc_chan_resources(struct dma_chan *chan) { … } static void sprd_dma_free_chan_resources(struct dma_chan *chan) { … } static enum dma_status sprd_dma_tx_status(struct dma_chan *chan, dma_cookie_t cookie, struct dma_tx_state *txstate) { … } static void sprd_dma_issue_pending(struct dma_chan *chan) { … } static int sprd_dma_get_datawidth(enum dma_slave_buswidth buswidth) { … } static int sprd_dma_get_step(enum dma_slave_buswidth buswidth) { … } static int sprd_dma_fill_desc(struct dma_chan *chan, struct sprd_dma_chn_hw *hw, unsigned int sglen, int sg_index, dma_addr_t src, dma_addr_t dst, u32 len, enum dma_transfer_direction dir, unsigned long flags, struct dma_slave_config *slave_cfg) { … } static int sprd_dma_fill_linklist_desc(struct dma_chan *chan, unsigned int sglen, int sg_index, dma_addr_t src, dma_addr_t dst, u32 len, enum dma_transfer_direction dir, unsigned long flags, struct dma_slave_config *slave_cfg) { … } static struct dma_async_tx_descriptor * sprd_dma_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, size_t len, unsigned long flags) { … } static struct dma_async_tx_descriptor * sprd_dma_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, unsigned int sglen, enum dma_transfer_direction dir, unsigned long flags, void *context) { … } static int sprd_dma_slave_config(struct dma_chan *chan, struct dma_slave_config *config) { … } static int sprd_dma_pause(struct dma_chan *chan) { … } static int sprd_dma_resume(struct dma_chan *chan) { … } static int sprd_dma_terminate_all(struct dma_chan *chan) { … } static void sprd_dma_free_desc(struct virt_dma_desc *vd) { … } static bool sprd_dma_filter_fn(struct dma_chan *chan, void *param) { … } static int sprd_dma_probe(struct platform_device *pdev) { … } static void sprd_dma_remove(struct platform_device *pdev) { … } static const struct of_device_id sprd_dma_match[] = …; MODULE_DEVICE_TABLE(of, sprd_dma_match); static int __maybe_unused sprd_dma_runtime_suspend(struct device *dev) { … } static int __maybe_unused sprd_dma_runtime_resume(struct device *dev) { … } static const struct dev_pm_ops sprd_dma_pm_ops = …; static struct platform_driver sprd_dma_driver = …; module_platform_driver(…) …; MODULE_LICENSE(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_AUTHOR(…) …; MODULE_ALIAS(…) …;
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