// SPDX-License-Identifier: GPL-2.0+ /* * Copyright (c) 2019 BayLibre, SAS * Author: Neil Armstrong <[email protected]> */ #include <linux/platform_device.h> #include <linux/pm_domain.h> #include <linux/bitfield.h> #include <linux/regmap.h> #include <linux/mfd/syscon.h> #include <linux/of.h> #include <linux/reset-controller.h> #include <linux/reset.h> #include <linux/clk.h> #include <linux/module.h> #include <dt-bindings/power/meson8-power.h> #include <dt-bindings/power/meson-axg-power.h> #include <dt-bindings/power/meson-g12a-power.h> #include <dt-bindings/power/meson-gxbb-power.h> #include <dt-bindings/power/meson-sm1-power.h> /* AO Offsets */ #define GX_AO_RTI_GEN_PWR_SLEEP0 … #define GX_AO_RTI_GEN_PWR_ISO0 … /* * Meson8/Meson8b/Meson8m2 only expose the power management registers of the * AO-bus as syscon. 0x3a from GX translates to 0x02, 0x3b translates to 0x03 * and so on. */ #define MESON8_AO_RTI_GEN_PWR_SLEEP0 … #define MESON8_AO_RTI_GEN_PWR_ISO0 … /* HHI Offsets */ #define HHI_MEM_PD_REG0 … #define HHI_VPU_MEM_PD_REG0 … #define HHI_VPU_MEM_PD_REG1 … #define HHI_VPU_MEM_PD_REG3 … #define HHI_VPU_MEM_PD_REG4 … #define HHI_AUDIO_MEM_PD_REG0 … #define HHI_NANOQ_MEM_PD_REG0 … #define HHI_NANOQ_MEM_PD_REG1 … #define HHI_VPU_MEM_PD_REG2 … #define G12A_HHI_NANOQ_MEM_PD_REG0 … #define G12A_HHI_NANOQ_MEM_PD_REG1 … #define G12A_HHI_ISP_MEM_PD_REG0 … #define G12A_HHI_ISP_MEM_PD_REG1 … struct meson_ee_pwrc; struct meson_ee_pwrc_domain; struct meson_ee_pwrc_mem_domain { … }; struct meson_ee_pwrc_top_domain { … }; struct meson_ee_pwrc_domain_desc { … }; struct meson_ee_pwrc_domain_data { … }; /* TOP Power Domains */ static struct meson_ee_pwrc_top_domain gx_pwrc_vpu = …; static struct meson_ee_pwrc_top_domain meson8_pwrc_vpu = …; #define SM1_EE_PD(__bit) … static struct meson_ee_pwrc_top_domain sm1_pwrc_vpu = …; static struct meson_ee_pwrc_top_domain sm1_pwrc_nna = …; static struct meson_ee_pwrc_top_domain sm1_pwrc_usb = …; static struct meson_ee_pwrc_top_domain sm1_pwrc_pci = …; static struct meson_ee_pwrc_top_domain sm1_pwrc_ge2d = …; static struct meson_ee_pwrc_top_domain g12a_pwrc_nna = …; static struct meson_ee_pwrc_top_domain g12a_pwrc_isp = …; /* Memory PD Domains */ #define VPU_MEMPD(__reg) … #define VPU_HHI_MEMPD(__reg) … static struct meson_ee_pwrc_mem_domain axg_pwrc_mem_vpu[] = …; static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_vpu[] = …; static struct meson_ee_pwrc_mem_domain gxbb_pwrc_mem_vpu[] = …; static struct meson_ee_pwrc_mem_domain meson_pwrc_mem_eth[] = …; static struct meson_ee_pwrc_mem_domain meson8_pwrc_audio_dsp_mem[] = …; static struct meson_ee_pwrc_mem_domain meson8_pwrc_mem_vpu[] = …; static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_vpu[] = …; static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_nna[] = …; static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_usb[] = …; static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_pcie[] = …; static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_ge2d[] = …; static struct meson_ee_pwrc_mem_domain axg_pwrc_mem_audio[] = …; static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_audio[] = …; static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_nna[] = …; static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_isp[] = …; #define VPU_PD(__name, __top_pd, __mem, __is_pwr_off, __resets, __clks) … #define TOP_PD(__name, __top_pd, __mem, __is_pwr_off) … #define MEM_PD(__name, __mem) … static bool pwrc_ee_is_powered_off(struct meson_ee_pwrc_domain *pwrc_domain); static struct meson_ee_pwrc_domain_desc axg_pwrc_domains[] = …; static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = …; static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = …; static struct meson_ee_pwrc_domain_desc meson8_pwrc_domains[] = …; static struct meson_ee_pwrc_domain_desc meson8b_pwrc_domains[] = …; static struct meson_ee_pwrc_domain_desc sm1_pwrc_domains[] = …; struct meson_ee_pwrc_domain { … }; struct meson_ee_pwrc { … }; static bool pwrc_ee_is_powered_off(struct meson_ee_pwrc_domain *pwrc_domain) { … } static int meson_ee_pwrc_off(struct generic_pm_domain *domain) { … } static int meson_ee_pwrc_on(struct generic_pm_domain *domain) { … } static int meson_ee_pwrc_init_domain(struct platform_device *pdev, struct meson_ee_pwrc *pwrc, struct meson_ee_pwrc_domain *dom) { … } static int meson_ee_pwrc_probe(struct platform_device *pdev) { … } static void meson_ee_pwrc_shutdown(struct platform_device *pdev) { … } static struct meson_ee_pwrc_domain_data meson_ee_g12a_pwrc_data = …; static struct meson_ee_pwrc_domain_data meson_ee_axg_pwrc_data = …; static struct meson_ee_pwrc_domain_data meson_ee_gxbb_pwrc_data = …; static struct meson_ee_pwrc_domain_data meson_ee_m8_pwrc_data = …; static struct meson_ee_pwrc_domain_data meson_ee_m8b_pwrc_data = …; static struct meson_ee_pwrc_domain_data meson_ee_sm1_pwrc_data = …; static const struct of_device_id meson_ee_pwrc_match_table[] = …; MODULE_DEVICE_TABLE(of, meson_ee_pwrc_match_table); static struct platform_driver meson_ee_pwrc_driver = …; module_platform_driver(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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