/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ /* * Copyright (C) 2020 Pengutronix, Sascha Hauer <[email protected]> */ #ifndef __DT_BINDINGS_IMX8MP_POWER_DOMAIN_POWER_H__ #define __DT_BINDINGS_IMX8MP_POWER_DOMAIN_POWER_H__ #define IMX8MP_POWER_DOMAIN_MIPI_PHY1 … #define IMX8MP_POWER_DOMAIN_PCIE_PHY … #define IMX8MP_POWER_DOMAIN_USB1_PHY … #define IMX8MP_POWER_DOMAIN_USB2_PHY … #define IMX8MP_POWER_DOMAIN_MLMIX … #define IMX8MP_POWER_DOMAIN_AUDIOMIX … #define IMX8MP_POWER_DOMAIN_GPU2D … #define IMX8MP_POWER_DOMAIN_GPUMIX … #define IMX8MP_POWER_DOMAIN_VPUMIX … #define IMX8MP_POWER_DOMAIN_GPU3D … #define IMX8MP_POWER_DOMAIN_MEDIAMIX … #define IMX8MP_POWER_DOMAIN_VPU_G1 … #define IMX8MP_POWER_DOMAIN_VPU_G2 … #define IMX8MP_POWER_DOMAIN_VPU_VC8000E … #define IMX8MP_POWER_DOMAIN_HDMIMIX … #define IMX8MP_POWER_DOMAIN_HDMI_PHY … #define IMX8MP_POWER_DOMAIN_MIPI_PHY2 … #define IMX8MP_POWER_DOMAIN_HSIOMIX … #define IMX8MP_POWER_DOMAIN_MEDIAMIX_ISPDWP … #define IMX8MP_HSIOBLK_PD_USB … #define IMX8MP_HSIOBLK_PD_USB_PHY1 … #define IMX8MP_HSIOBLK_PD_USB_PHY2 … #define IMX8MP_HSIOBLK_PD_PCIE … #define IMX8MP_HSIOBLK_PD_PCIE_PHY … #define IMX8MP_MEDIABLK_PD_MIPI_DSI_1 … #define IMX8MP_MEDIABLK_PD_MIPI_CSI2_1 … #define IMX8MP_MEDIABLK_PD_LCDIF_1 … #define IMX8MP_MEDIABLK_PD_ISI … #define IMX8MP_MEDIABLK_PD_MIPI_CSI2_2 … #define IMX8MP_MEDIABLK_PD_LCDIF_2 … #define IMX8MP_MEDIABLK_PD_ISP … #define IMX8MP_MEDIABLK_PD_DWE … #define IMX8MP_MEDIABLK_PD_MIPI_DSI_2 … #define IMX8MP_HDMIBLK_PD_IRQSTEER … #define IMX8MP_HDMIBLK_PD_LCDIF … #define IMX8MP_HDMIBLK_PD_PAI … #define IMX8MP_HDMIBLK_PD_PVI … #define IMX8MP_HDMIBLK_PD_TRNG … #define IMX8MP_HDMIBLK_PD_HDMI_TX … #define IMX8MP_HDMIBLK_PD_HDMI_TX_PHY … #define IMX8MP_HDMIBLK_PD_HDCP … #define IMX8MP_HDMIBLK_PD_HRV … #define IMX8MP_VPUBLK_PD_G1 … #define IMX8MP_VPUBLK_PD_G2 … #define IMX8MP_VPUBLK_PD_VC8000E … #endif
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