linux/drivers/vdpa/solidrun/snet_ctrl.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * SolidRun DPU driver for control plane
 *
 * Copyright (C) 2022-2023 SolidRun
 *
 * Author: Alvaro Karsz <[email protected]>
 *
 */

#include <linux/iopoll.h>

#include "snet_vdpa.h"

enum snet_ctrl_opcodes { … };

#define SNET_CTRL_TIMEOUT …

#define SNET_CTRL_DATA_SIZE_MASK …
#define SNET_CTRL_IN_PROCESS_MASK …
#define SNET_CTRL_CHUNK_RDY_MASK …
#define SNET_CTRL_ERROR_MASK …

#define SNET_VAL_TO_ERR(val) …
#define SNET_EMPTY_CTRL(val) …
#define SNET_DATA_READY(val) …

/* Control register used to read data from the DPU */
struct snet_ctrl_reg_ctrl { … };

/* Opcode register */
struct snet_ctrl_reg_op { … };

struct snet_ctrl_regs { … };

static struct snet_ctrl_regs __iomem *snet_get_ctrl(struct snet *snet)
{ … }

static int snet_wait_for_empty_ctrl(struct snet_ctrl_regs __iomem *regs)
{ … }

static int snet_wait_for_empty_op(struct snet_ctrl_regs __iomem *regs)
{ … }

static int snet_wait_for_data(struct snet_ctrl_regs __iomem *regs)
{ … }

static u32 snet_read32_word(struct snet_ctrl_regs __iomem *ctrl_regs, u16 word_idx)
{ … }

static u32 snet_read_ctrl(struct snet_ctrl_regs __iomem *ctrl_regs)
{ … }

static void snet_write_ctrl(struct snet_ctrl_regs __iomem *ctrl_regs, u32 val)
{ … }

static void snet_write_op(struct snet_ctrl_regs __iomem *ctrl_regs, u32 val)
{ … }

static int snet_wait_for_dpu_completion(struct snet_ctrl_regs __iomem *ctrl_regs)
{ … }

/* Reading ctrl from the DPU:
 * buf_size must be 4B aligned
 *
 * Steps:
 *
 * (1) Verify that the DPU is not in the middle of another operation by
 *     reading the in_process and error bits in the control register.
 * (2) Write the request opcode and the VQ idx in the opcode register
 *     and write the buffer size in the control register.
 * (3) Start readind chunks of data, chunk_ready bit indicates that a
 *     data chunk is available, we signal that we read the data by clearing the bit.
 * (4) Detect that the transfer is completed when the in_process bit
 *     in the control register is cleared or when the an error appears.
 */
static int snet_ctrl_read_from_dpu(struct snet *snet, u16 opcode, u16 vq_idx, void *buffer,
				   u32 buf_size)
{ … }

/* Send a control message to the DPU using the old mechanism
 * used with config version 1.
 */
static int snet_send_ctrl_msg_old(struct snet *snet, u32 opcode)
{ … }

/* Send a control message to the DPU.
 * A control message is a message without payload.
 */
static int snet_send_ctrl_msg(struct snet *snet, u16 opcode, u16 vq_idx)
{ … }

void snet_ctrl_clear(struct snet *snet)
{ … }

int snet_destroy_dev(struct snet *snet)
{ … }

int snet_read_vq_state(struct snet *snet, u16 idx, struct vdpa_vq_state *state)
{ … }

int snet_suspend_dev(struct snet *snet)
{ … }

int snet_resume_dev(struct snet *snet)
{ … }