linux/include/linux/mfd/max8907.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Functions to access MAX8907 power management chip.
 *
 * Copyright (C) 2010 Gyungoh Yoo <[email protected]>
 * Copyright (C) 2012, NVIDIA CORPORATION. All rights reserved.
 */

#ifndef __LINUX_MFD_MAX8907_H
#define __LINUX_MFD_MAX8907_H

#include <linux/mutex.h>
#include <linux/pm.h>

#define MAX8907_GEN_I2C_ADDR
#define MAX8907_ADC_I2C_ADDR
#define MAX8907_RTC_I2C_ADDR

/* MAX8907 register map */
#define MAX8907_REG_SYSENSEL
#define MAX8907_REG_ON_OFF_IRQ1
#define MAX8907_REG_ON_OFF_IRQ1_MASK
#define MAX8907_REG_ON_OFF_STAT
#define MAX8907_REG_SDCTL1
#define MAX8907_REG_SDSEQCNT1
#define MAX8907_REG_SDV1
#define MAX8907_REG_SDCTL2
#define MAX8907_REG_SDSEQCNT2
#define MAX8907_REG_SDV2
#define MAX8907_REG_SDCTL3
#define MAX8907_REG_SDSEQCNT3
#define MAX8907_REG_SDV3
#define MAX8907_REG_ON_OFF_IRQ2
#define MAX8907_REG_ON_OFF_IRQ2_MASK
#define MAX8907_REG_RESET_CNFG
#define MAX8907_REG_LDOCTL16
#define MAX8907_REG_LDOSEQCNT16
#define MAX8907_REG_LDO16VOUT
#define MAX8907_REG_SDBYSEQCNT
#define MAX8907_REG_LDOCTL17
#define MAX8907_REG_LDOSEQCNT17
#define MAX8907_REG_LDO17VOUT
#define MAX8907_REG_LDOCTL1
#define MAX8907_REG_LDOSEQCNT1
#define MAX8907_REG_LDO1VOUT
#define MAX8907_REG_LDOCTL2
#define MAX8907_REG_LDOSEQCNT2
#define MAX8907_REG_LDO2VOUT
#define MAX8907_REG_LDOCTL3
#define MAX8907_REG_LDOSEQCNT3
#define MAX8907_REG_LDO3VOUT
#define MAX8907_REG_LDOCTL4
#define MAX8907_REG_LDOSEQCNT4
#define MAX8907_REG_LDO4VOUT
#define MAX8907_REG_LDOCTL5
#define MAX8907_REG_LDOSEQCNT5
#define MAX8907_REG_LDO5VOUT
#define MAX8907_REG_LDOCTL6
#define MAX8907_REG_LDOSEQCNT6
#define MAX8907_REG_LDO6VOUT
#define MAX8907_REG_LDOCTL7
#define MAX8907_REG_LDOSEQCNT7
#define MAX8907_REG_LDO7VOUT
#define MAX8907_REG_LDOCTL8
#define MAX8907_REG_LDOSEQCNT8
#define MAX8907_REG_LDO8VOUT
#define MAX8907_REG_LDOCTL9
#define MAX8907_REG_LDOSEQCNT9
#define MAX8907_REG_LDO9VOUT
#define MAX8907_REG_LDOCTL10
#define MAX8907_REG_LDOSEQCNT10
#define MAX8907_REG_LDO10VOUT
#define MAX8907_REG_LDOCTL11
#define MAX8907_REG_LDOSEQCNT11
#define MAX8907_REG_LDO11VOUT
#define MAX8907_REG_LDOCTL12
#define MAX8907_REG_LDOSEQCNT12
#define MAX8907_REG_LDO12VOUT
#define MAX8907_REG_LDOCTL13
#define MAX8907_REG_LDOSEQCNT13
#define MAX8907_REG_LDO13VOUT
#define MAX8907_REG_LDOCTL14
#define MAX8907_REG_LDOSEQCNT14
#define MAX8907_REG_LDO14VOUT
#define MAX8907_REG_LDOCTL15
#define MAX8907_REG_LDOSEQCNT15
#define MAX8907_REG_LDO15VOUT
#define MAX8907_REG_OUT5VEN
#define MAX8907_REG_OUT5VSEQ
#define MAX8907_REG_OUT33VEN
#define MAX8907_REG_OUT33VSEQ
#define MAX8907_REG_LDOCTL19
#define MAX8907_REG_LDOSEQCNT19
#define MAX8907_REG_LDO19VOUT
#define MAX8907_REG_LBCNFG
#define MAX8907_REG_SEQ1CNFG
#define MAX8907_REG_SEQ2CNFG
#define MAX8907_REG_SEQ3CNFG
#define MAX8907_REG_SEQ4CNFG
#define MAX8907_REG_SEQ5CNFG
#define MAX8907_REG_SEQ6CNFG
#define MAX8907_REG_SEQ7CNFG
#define MAX8907_REG_LDOCTL18
#define MAX8907_REG_LDOSEQCNT18
#define MAX8907_REG_LDO18VOUT
#define MAX8907_REG_BBAT_CNFG
#define MAX8907_REG_CHG_CNTL1
#define MAX8907_REG_CHG_CNTL2
#define MAX8907_REG_CHG_IRQ1
#define MAX8907_REG_CHG_IRQ2
#define MAX8907_REG_CHG_IRQ1_MASK
#define MAX8907_REG_CHG_IRQ2_MASK
#define MAX8907_REG_CHG_STAT
#define MAX8907_REG_WLED_MODE_CNTL
#define MAX8907_REG_ILED_CNTL
#define MAX8907_REG_II1RR
#define MAX8907_REG_II2RR
#define MAX8907_REG_LDOCTL20
#define MAX8907_REG_LDOSEQCNT20
#define MAX8907_REG_LDO20VOUT

/* RTC register map */
#define MAX8907_REG_RTC_SEC
#define MAX8907_REG_RTC_MIN
#define MAX8907_REG_RTC_HOURS
#define MAX8907_REG_RTC_WEEKDAY
#define MAX8907_REG_RTC_DATE
#define MAX8907_REG_RTC_MONTH
#define MAX8907_REG_RTC_YEAR1
#define MAX8907_REG_RTC_YEAR2
#define MAX8907_REG_ALARM0_SEC
#define MAX8907_REG_ALARM0_MIN
#define MAX8907_REG_ALARM0_HOURS
#define MAX8907_REG_ALARM0_WEEKDAY
#define MAX8907_REG_ALARM0_DATE
#define MAX8907_REG_ALARM0_MONTH
#define MAX8907_REG_ALARM0_YEAR1
#define MAX8907_REG_ALARM0_YEAR2
#define MAX8907_REG_ALARM1_SEC
#define MAX8907_REG_ALARM1_MIN
#define MAX8907_REG_ALARM1_HOURS
#define MAX8907_REG_ALARM1_WEEKDAY
#define MAX8907_REG_ALARM1_DATE
#define MAX8907_REG_ALARM1_MONTH
#define MAX8907_REG_ALARM1_YEAR1
#define MAX8907_REG_ALARM1_YEAR2
#define MAX8907_REG_ALARM0_CNTL
#define MAX8907_REG_ALARM1_CNTL
#define MAX8907_REG_RTC_STATUS
#define MAX8907_REG_RTC_CNTL
#define MAX8907_REG_RTC_IRQ
#define MAX8907_REG_RTC_IRQ_MASK
#define MAX8907_REG_MPL_CNTL

/* ADC and Touch Screen Controller register map */
#define MAX8907_CTL
#define MAX8907_SEQCNT
#define MAX8907_VOUT

/* mask bit fields */
#define MAX8907_MASK_LDO_SEQ
#define MAX8907_MASK_LDO_EN
#define MAX8907_MASK_VBBATTCV
#define MAX8907_MASK_OUT5V_VINEN
#define MAX8907_MASK_OUT5V_ENSRC
#define MAX8907_MASK_OUT5V_EN
#define MAX8907_MASK_POWER_OFF

/* Regulator IDs */
#define MAX8907_MBATT
#define MAX8907_SD1
#define MAX8907_SD2
#define MAX8907_SD3
#define MAX8907_LDO1
#define MAX8907_LDO2
#define MAX8907_LDO3
#define MAX8907_LDO4
#define MAX8907_LDO5
#define MAX8907_LDO6
#define MAX8907_LDO7
#define MAX8907_LDO8
#define MAX8907_LDO9
#define MAX8907_LDO10
#define MAX8907_LDO11
#define MAX8907_LDO12
#define MAX8907_LDO13
#define MAX8907_LDO14
#define MAX8907_LDO15
#define MAX8907_LDO16
#define MAX8907_LDO17
#define MAX8907_LDO18
#define MAX8907_LDO19
#define MAX8907_LDO20
#define MAX8907_OUT5V
#define MAX8907_OUT33V
#define MAX8907_BBAT
#define MAX8907_SDBY
#define MAX8907_VRTC
#define MAX8907_NUM_REGULATORS

/* IRQ definitions */
enum {};

struct max8907_platform_data {};

struct regmap_irq_chips_data;

struct max8907 {};

#endif