// SPDX-License-Identifier: GPL-2.0+ /* Synopsys DesignWare 8250 library. */ #include <linux/bitops.h> #include <linux/bitfield.h> #include <linux/delay.h> #include <linux/device.h> #include <linux/kernel.h> #include <linux/math.h> #include <linux/property.h> #include <linux/serial_8250.h> #include <linux/serial_core.h> #include "8250_dwlib.h" /* Offsets for the DesignWare specific registers */ #define DW_UART_TCR … #define DW_UART_DE_EN … #define DW_UART_RE_EN … #define DW_UART_DLF … #define DW_UART_RAR … #define DW_UART_TAR … #define DW_UART_LCR_EXT … #define DW_UART_CPR … #define DW_UART_UCV … /* Receive / Transmit Address Register bits */ #define DW_UART_ADDR_MASK … /* Line Status Register bits */ #define DW_UART_LSR_ADDR_RCVD … /* Transceiver Control Register bits */ #define DW_UART_TCR_RS485_EN … #define DW_UART_TCR_RE_POL … #define DW_UART_TCR_DE_POL … #define DW_UART_TCR_XFER_MODE … #define DW_UART_TCR_XFER_MODE_DE_DURING_RE … #define DW_UART_TCR_XFER_MODE_SW_DE_OR_RE … #define DW_UART_TCR_XFER_MODE_DE_OR_RE … /* Line Extended Control Register bits */ #define DW_UART_LCR_EXT_DLS_E … #define DW_UART_LCR_EXT_ADDR_MATCH … #define DW_UART_LCR_EXT_SEND_ADDR … #define DW_UART_LCR_EXT_TRANSMIT_MODE … /* Component Parameter Register bits */ #define DW_UART_CPR_ABP_DATA_WIDTH … #define DW_UART_CPR_AFCE_MODE … #define DW_UART_CPR_THRE_MODE … #define DW_UART_CPR_SIR_MODE … #define DW_UART_CPR_SIR_LP_MODE … #define DW_UART_CPR_ADDITIONAL_FEATURES … #define DW_UART_CPR_FIFO_ACCESS … #define DW_UART_CPR_FIFO_STAT … #define DW_UART_CPR_SHADOW … #define DW_UART_CPR_ENCODED_PARMS … #define DW_UART_CPR_DMA_EXTRA … #define DW_UART_CPR_FIFO_MODE … /* Helper for FIFO size calculation */ #define DW_UART_CPR_FIFO_SIZE(a) … /* * divisor = div(I) + div(F) * "I" means integer, "F" means fractional * quot = div(I) = clk / (16 * baud) * frac = div(F) * 2^dlf_size * * let rem = clk % (16 * baud) * we have: div(F) * (16 * baud) = rem * so frac = 2^dlf_size * rem / (16 * baud) = (rem << dlf_size) / (16 * baud) */ static unsigned int dw8250_get_divisor(struct uart_port *p, unsigned int baud, unsigned int *frac) { … } static void dw8250_set_divisor(struct uart_port *p, unsigned int baud, unsigned int quot, unsigned int quot_frac) { … } void dw8250_do_set_termios(struct uart_port *p, struct ktermios *termios, const struct ktermios *old) { … } EXPORT_SYMBOL_GPL(…); /* * Wait until re is de-asserted for sure. An ongoing receive will keep * re asserted until end of frame. Without BUSY indication available, * only available course of action is to wait for the time it takes to * receive one frame (there might nothing to receive but w/o BUSY the * driver cannot know). */ static void dw8250_wait_re_deassert(struct uart_port *p) { … } static void dw8250_update_rar(struct uart_port *p, u32 addr) { … } static void dw8250_rs485_set_addr(struct uart_port *p, struct serial_rs485 *rs485, struct ktermios *termios) { … } static int dw8250_rs485_config(struct uart_port *p, struct ktermios *termios, struct serial_rs485 *rs485) { … } /* * Tests if RE_EN register can have non-zero value to see if RS-485 HW support * is present. */ static bool dw8250_detect_rs485_hw(struct uart_port *p) { … } static const struct serial_rs485 dw8250_rs485_supported = …; void dw8250_setup_port(struct uart_port *p) { … } EXPORT_SYMBOL_GPL(…);
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