// SPDX-License-Identifier: GPL-2.0-only /* Copyright (c) 2020, Broadcom */ /* * 8250-core based driver for Broadcom ns16550a UARTs * * This driver uses the standard 8250 driver core but adds additional * optional features including the ability to use a baud rate clock * mux for more accurate high speed baud rate selection and also * an optional DMA engine. * */ #include <linux/module.h> #include <linux/types.h> #include <linux/tty.h> #include <linux/errno.h> #include <linux/device.h> #include <linux/io.h> #include <linux/of.h> #include <linux/dma-mapping.h> #include <linux/tty_flip.h> #include <linux/delay.h> #include <linux/clk.h> #include <linux/debugfs.h> #include <linux/units.h> #include "8250.h" /* Register definitions for UART DMA block. Version 1.1 or later. */ #define UDMA_ARB_RX … #define UDMA_ARB_TX … #define UDMA_ARB_REQ … #define UDMA_ARB_GRANT … #define UDMA_RX_REVISION … #define UDMA_RX_REVISION_REQUIRED … #define UDMA_RX_CTRL … #define UDMA_RX_CTRL_BUF_CLOSE_MODE … #define UDMA_RX_CTRL_MASK_WR_DONE … #define UDMA_RX_CTRL_ENDIAN_OVERRIDE … #define UDMA_RX_CTRL_ENDIAN … #define UDMA_RX_CTRL_OE_IS_ERR … #define UDMA_RX_CTRL_PE_IS_ERR … #define UDMA_RX_CTRL_FE_IS_ERR … #define UDMA_RX_CTRL_NUM_BUF_USED_MASK … #define UDMA_RX_CTRL_NUM_BUF_USED_SHIFT … #define UDMA_RX_CTRL_BUF_CLOSE_CLK_SEL_SYS … #define UDMA_RX_CTRL_BUF_CLOSE_ENA … #define UDMA_RX_CTRL_TIMEOUT_CLK_SEL_SYS … #define UDMA_RX_CTRL_TIMEOUT_ENA … #define UDMA_RX_CTRL_ABORT … #define UDMA_RX_CTRL_ENA … #define UDMA_RX_STATUS … #define UDMA_RX_STATUS_ACTIVE_BUF_MASK … #define UDMA_RX_TRANSFER_LEN … #define UDMA_RX_TRANSFER_TOTAL … #define UDMA_RX_BUFFER_SIZE … #define UDMA_RX_SRC_ADDR … #define UDMA_RX_TIMEOUT … #define UDMA_RX_BUFFER_CLOSE … #define UDMA_RX_BLOCKOUT_COUNTER … #define UDMA_RX_BUF0_PTR_LO … #define UDMA_RX_BUF0_PTR_HI … #define UDMA_RX_BUF0_STATUS … #define UDMA_RX_BUFX_STATUS_OVERRUN_ERR … #define UDMA_RX_BUFX_STATUS_FRAME_ERR … #define UDMA_RX_BUFX_STATUS_PARITY_ERR … #define UDMA_RX_BUFX_STATUS_CLOSE_EXPIRED … #define UDMA_RX_BUFX_STATUS_DATA_RDY … #define UDMA_RX_BUF0_DATA_LEN … #define UDMA_RX_BUF1_PTR_LO … #define UDMA_RX_BUF1_PTR_HI … #define UDMA_RX_BUF1_STATUS … #define UDMA_RX_BUF1_DATA_LEN … #define UDMA_TX_REVISION … #define UDMA_TX_REVISION_REQUIRED … #define UDMA_TX_CTRL … #define UDMA_TX_CTRL_ENDIAN_OVERRIDE … #define UDMA_TX_CTRL_ENDIAN … #define UDMA_TX_CTRL_NUM_BUF_USED_MASK … #define UDMA_TX_CTRL_NUM_BUF_USED_1 … #define UDMA_TX_CTRL_ABORT … #define UDMA_TX_CTRL_ENA … #define UDMA_TX_DST_ADDR … #define UDMA_TX_BLOCKOUT_COUNTER … #define UDMA_TX_TRANSFER_LEN … #define UDMA_TX_TRANSFER_TOTAL … #define UDMA_TX_STATUS … #define UDMA_TX_BUF0_PTR_LO … #define UDMA_TX_BUF0_PTR_HI … #define UDMA_TX_BUF0_STATUS … #define UDMA_TX_BUFX_LAST … #define UDMA_TX_BUFX_EMPTY … #define UDMA_TX_BUF0_DATA_LEN … #define UDMA_TX_BUF0_DATA_SENT … #define UDMA_TX_BUF1_PTR_LO … #define UDMA_INTR_STATUS … #define UDMA_INTR_ARB_TX_GRANT … #define UDMA_INTR_ARB_RX_GRANT … #define UDMA_INTR_TX_ALL_EMPTY … #define UDMA_INTR_TX_EMPTY_BUF1 … #define UDMA_INTR_TX_EMPTY_BUF0 … #define UDMA_INTR_TX_ABORT … #define UDMA_INTR_TX_DONE … #define UDMA_INTR_RX_ERROR … #define UDMA_INTR_RX_TIMEOUT … #define UDMA_INTR_RX_READY_BUF7 … #define UDMA_INTR_RX_READY_BUF6 … #define UDMA_INTR_RX_READY_BUF5 … #define UDMA_INTR_RX_READY_BUF4 … #define UDMA_INTR_RX_READY_BUF3 … #define UDMA_INTR_RX_READY_BUF2 … #define UDMA_INTR_RX_READY_BUF1 … #define UDMA_INTR_RX_READY_BUF0 … #define UDMA_INTR_RX_READY_MASK … #define UDMA_INTR_RX_READY_SHIFT … #define UDMA_INTR_RX_ABORT … #define UDMA_INTR_RX_DONE … #define UDMA_INTR_SET … #define UDMA_INTR_CLEAR … #define UDMA_INTR_MASK_STATUS … #define UDMA_INTR_MASK_SET … #define UDMA_INTR_MASK_CLEAR … #define UDMA_RX_INTERRUPTS … #define UDMA_RX_ERR_INTERRUPTS … #define UDMA_TX_INTERRUPTS … #define UDMA_IS_RX_INTERRUPT(status) … #define UDMA_IS_TX_INTERRUPT(status) … /* Current devices have 8 sets of RX buffer registers */ #define UDMA_RX_BUFS_COUNT … #define UDMA_RX_BUFS_REG_OFFSET … #define UDMA_RX_BUFx_PTR_LO(x) … #define UDMA_RX_BUFx_PTR_HI(x) … #define UDMA_RX_BUFx_STATUS(x) … #define UDMA_RX_BUFx_DATA_LEN(x) … /* Current devices have 2 sets of TX buffer registers */ #define UDMA_TX_BUFS_COUNT … #define UDMA_TX_BUFS_REG_OFFSET … #define UDMA_TX_BUFx_PTR_LO(x) … #define UDMA_TX_BUFx_PTR_HI(x) … #define UDMA_TX_BUFx_STATUS(x) … #define UDMA_TX_BUFx_DATA_LEN(x) … #define UDMA_TX_BUFx_DATA_SENT(x) … #define REGS_8250 … #define REGS_DMA_RX … #define REGS_DMA_TX … #define REGS_DMA_ISR … #define REGS_DMA_ARB … #define REGS_MAX … #define TX_BUF_SIZE … #define RX_BUF_SIZE … #define RX_BUFS_COUNT … static const u32 brcmstb_rate_table[] = …; static const u32 brcmstb_rate_table_7278[] = …; struct brcmuart_priv { … }; static struct dentry *brcmuart_debugfs_root; /* * Register access routines */ static u32 udma_readl(struct brcmuart_priv *priv, int reg_type, int offset) { … } static void udma_writel(struct brcmuart_priv *priv, int reg_type, int offset, u32 value) { … } static void udma_set(struct brcmuart_priv *priv, int reg_type, int offset, u32 bits) { … } static void udma_unset(struct brcmuart_priv *priv, int reg_type, int offset, u32 bits) { … } /* * The UART DMA engine hardware can be used by multiple UARTS, but * only one at a time. Sharing is not currently supported so * the first UART to request the DMA engine will get it and any * subsequent requests by other UARTS will fail. */ static int brcmuart_arbitration(struct brcmuart_priv *priv, bool acquire) { … } static void brcmuart_init_dma_hardware(struct brcmuart_priv *priv) { … } static void start_rx_dma(struct uart_8250_port *p) { … } static void stop_rx_dma(struct uart_8250_port *p) { … } static int stop_tx_dma(struct uart_8250_port *p) { … } /* * NOTE: printk's in this routine will hang the system if this is * the console tty */ static int brcmuart_tx_dma(struct uart_8250_port *p) { … } static void brcmuart_rx_buf_done_isr(struct uart_port *up, int index) { … } static void brcmuart_rx_isr(struct uart_port *up, u32 rx_isr) { … } static void brcmuart_tx_isr(struct uart_port *up, u32 isr) { … } static irqreturn_t brcmuart_isr(int irq, void *dev_id) { … } static int brcmuart_startup(struct uart_port *port) { … } static void brcmuart_shutdown(struct uart_port *port) { … } /* * Not all clocks run at the exact specified rate, so set each requested * rate and then get the actual rate. */ static void init_real_clk_rates(struct device *dev, struct brcmuart_priv *priv) { … } static u32 find_quot(struct device *dev, u32 freq, u32 baud, u32 *percent) { … } static void set_clock_mux(struct uart_port *up, struct brcmuart_priv *priv, u32 baud) { … } static void brcmstb_set_termios(struct uart_port *up, struct ktermios *termios, const struct ktermios *old) { … } static int brcmuart_handle_irq(struct uart_port *p) { … } static enum hrtimer_restart brcmuart_hrtimer_func(struct hrtimer *t) { … } static const struct of_device_id brcmuart_dt_ids[] = …; MODULE_DEVICE_TABLE(of, brcmuart_dt_ids); static void brcmuart_free_bufs(struct device *dev, struct brcmuart_priv *priv) { … } static void brcmuart_throttle(struct uart_port *port) { … } static void brcmuart_unthrottle(struct uart_port *port) { … } static int debugfs_stats_show(struct seq_file *s, void *unused) { … } DEFINE_SHOW_ATTRIBUTE(…); static void brcmuart_init_debugfs(struct brcmuart_priv *priv, const char *device) { … } static int brcmuart_probe(struct platform_device *pdev) { … } static void brcmuart_remove(struct platform_device *pdev) { … } static int __maybe_unused brcmuart_suspend(struct device *dev) { … } static int __maybe_unused brcmuart_resume(struct device *dev) { … } static const struct dev_pm_ops brcmuart_dev_pm_ops = …; static struct platform_driver brcmuart_platform_driver = …; static int __init brcmuart_init(void) { … } module_init(…) …; static void __exit brcmuart_deinit(void) { … } module_exit(brcmuart_deinit); MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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