/* SPDX-License-Identifier: GPL-2.0+ */ /************************************************************************ * Copyright 2003 Digi International (www.digi.com) * * Copyright (C) 2004 IBM Corporation. All rights reserved. * * Contact Information: * Scott H Kilau <[email protected]> * Wendy Xiong <[email protected]> * ***********************************************************************/ #ifndef __JSM_DRIVER_H #define __JSM_DRIVER_H #include <linux/kernel.h> #include <linux/types.h> /* To pick up the varions Linux types */ #include <linux/tty.h> #include <linux/serial_core.h> #include <linux/device.h> /* * Debugging levels can be set using debug insmod variable * They can also be compiled out completely. */ enum { … }; #define jsm_dbg(nlevel, pdev, fmt, ...) … #define MAXLINES … #define MAXPORTS … #define MAX_STOPS_SENT … /* Board ids */ #define PCI_DEVICE_ID_CLASSIC_4 … #define PCI_DEVICE_ID_CLASSIC_8 … #define PCI_DEVICE_ID_CLASSIC_4_422 … #define PCI_DEVICE_ID_CLASSIC_8_422 … #define PCI_DEVICE_ID_NEO_4 … #define PCI_DEVICE_ID_NEO_1_422 … #define PCI_DEVICE_ID_NEO_1_422_485 … #define PCI_DEVICE_ID_NEO_2_422_485 … #define PCIE_DEVICE_ID_NEO_8 … #define PCIE_DEVICE_ID_NEO_4 … #define PCIE_DEVICE_ID_NEO_4RJ45 … #define PCIE_DEVICE_ID_NEO_8RJ45 … /* Board type definitions */ #define T_NEO … #define T_CLASSIC … #define T_PCIBUS … /* Board State Definitions */ #define BD_RUNNING … #define BD_REASON … #define BD_NOTFOUND … #define BD_NOIOPORT … #define BD_NOMEM … #define BD_NOBIOS … #define BD_NOFEP … #define BD_FAILED … #define BD_ALLOCATED … #define BD_TRIBOOT … #define BD_BADKME … /* 4 extra for alignment play space */ #define WRITEBUFLEN … #define JSM_VERSION … #define JSM_PARTNUM … struct jsm_board; struct jsm_channel; /************************************************************************ * Per board operations structure * ************************************************************************/ struct board_ops { … }; /* * Per-board information */ struct jsm_board { … }; /************************************************************************ * Device flag definitions for ch_flags. ************************************************************************/ #define CH_PRON … #define CH_STOP … #define CH_STOPI … #define CH_CD … #define CH_FCAR … #define CH_HANGUP … #define CH_RECEIVER_OFF … #define CH_OPENING … #define CH_CLOSING … #define CH_FIFO_ENABLED … #define CH_TX_FIFO_EMPTY … #define CH_TX_FIFO_LWM … #define CH_BREAK_SENDING … #define CH_LOOPBACK … #define CH_BAUD0 … /* Our Read/Error queue sizes */ #define RQUEUEMASK … #define EQUEUEMASK … #define RQUEUESIZE … #define EQUEUESIZE … /************************************************************************ * Channel information structure. ************************************************************************/ struct jsm_channel { … }; /************************************************************************ * Per channel/port Classic UART structures * ************************************************************************ * Base Structure Entries Usage Meanings to Host * * * * W = read write R = read only * * U = Unused. * ************************************************************************/ struct cls_uart_struct { … }; /* Where to read the interrupt register (8bits) */ #define UART_CLASSIC_POLL_ADDR_OFFSET … #define UART_EXAR654_ENHANCED_REGISTER_SET … #define UART_16654_FCR_TXTRIGGER_8 … #define UART_16654_FCR_TXTRIGGER_16 … #define UART_16654_FCR_TXTRIGGER_32 … #define UART_16654_FCR_TXTRIGGER_56 … #define UART_16654_FCR_RXTRIGGER_8 … #define UART_16654_FCR_RXTRIGGER_16 … #define UART_16654_FCR_RXTRIGGER_56 … #define UART_16654_FCR_RXTRIGGER_60 … #define UART_IIR_CTSRTS … #define UART_IIR_RDI_TIMEOUT … /* * These are the EXTENDED definitions for the Exar 654's Interrupt * Enable Register. */ #define UART_EXAR654_EFR_ECB … #define UART_EXAR654_EFR_IXON … #define UART_EXAR654_EFR_IXOFF … #define UART_EXAR654_EFR_RTSDTR … #define UART_EXAR654_EFR_CTSDSR … #define UART_EXAR654_XOFF_DETECT … #define UART_EXAR654_XON_DETECT … #define UART_EXAR654_IER_XOFF … #define UART_EXAR654_IER_RTSDTR … #define UART_EXAR654_IER_CTSDSR … /************************************************************************ * Per channel/port NEO UART structure * ************************************************************************ * Base Structure Entries Usage Meanings to Host * * * * W = read write R = read only * * U = Unused. * ************************************************************************/ struct neo_uart_struct { … }; /* Where to read the extended interrupt register (32bits instead of 8bits) */ #define UART_17158_POLL_ADDR_OFFSET … /* * These are the redefinitions for the FCTR on the XR17C158, since * Exar made them different than their earlier design. (XR16C854) */ /* These are only applicable when table D is selected */ #define UART_17158_FCTR_RTS_NODELAY … #define UART_17158_FCTR_RTS_4DELAY … #define UART_17158_FCTR_RTS_6DELAY … #define UART_17158_FCTR_RTS_8DELAY … #define UART_17158_FCTR_RTS_12DELAY … #define UART_17158_FCTR_RTS_16DELAY … #define UART_17158_FCTR_RTS_20DELAY … #define UART_17158_FCTR_RTS_24DELAY … #define UART_17158_FCTR_RTS_28DELAY … #define UART_17158_FCTR_RTS_32DELAY … #define UART_17158_FCTR_RTS_36DELAY … #define UART_17158_FCTR_RTS_40DELAY … #define UART_17158_FCTR_RTS_44DELAY … #define UART_17158_FCTR_RTS_48DELAY … #define UART_17158_FCTR_RTS_52DELAY … #define UART_17158_FCTR_RTS_IRDA … #define UART_17158_FCTR_RS485 … #define UART_17158_FCTR_TRGA … #define UART_17158_FCTR_TRGB … #define UART_17158_FCTR_TRGC … #define UART_17158_FCTR_TRGD … /* 17158 trigger table selects.. */ #define UART_17158_FCTR_BIT6 … #define UART_17158_FCTR_BIT7 … /* 17158 TX/RX memmapped buffer offsets */ #define UART_17158_RX_FIFOSIZE … #define UART_17158_TX_FIFOSIZE … /* 17158 Extended IIR's */ #define UART_17158_IIR_RDI_TIMEOUT … #define UART_17158_IIR_XONXOFF … #define UART_17158_IIR_HWFLOW_STATE_CHANGE … #define UART_17158_IIR_FIFO_ENABLED … /* * These are the extended interrupts that get sent * back to us from the UART's 32bit interrupt register */ #define UART_17158_RX_LINE_STATUS … #define UART_17158_RXRDY_TIMEOUT … #define UART_17158_TXRDY … #define UART_17158_MSR … #define UART_17158_TX_AND_FIFO_CLR … #define UART_17158_RX_FIFO_DATA_ERROR … /* * These are the EXTENDED definitions for the 17C158's Interrupt * Enable Register. */ #define UART_17158_EFR_ECB … #define UART_17158_EFR_IXON … #define UART_17158_EFR_IXOFF … #define UART_17158_EFR_RTSDTR … #define UART_17158_EFR_CTSDSR … #define UART_17158_XOFF_DETECT … #define UART_17158_XON_DETECT … #define UART_17158_IER_RSVD1 … #define UART_17158_IER_XOFF … #define UART_17158_IER_RTSDTR … #define UART_17158_IER_CTSDSR … #define PCI_DEVICE_NEO_2DB9_PCI_NAME … #define PCI_DEVICE_NEO_2DB9PRI_PCI_NAME … #define PCI_DEVICE_NEO_2RJ45_PCI_NAME … #define PCI_DEVICE_NEO_2RJ45PRI_PCI_NAME … #define PCIE_DEVICE_NEO_IBM_PCI_NAME … /* * Our Global Variables. */ extern struct uart_driver jsm_uart_driver; extern struct board_ops jsm_neo_ops; extern struct board_ops jsm_cls_ops; extern int jsm_debug; /************************************************************************* * * Prototypes for non-static functions used in more than one module * *************************************************************************/ int jsm_tty_init(struct jsm_board *); int jsm_uart_port_init(struct jsm_board *); int jsm_remove_uart_port(struct jsm_board *); void jsm_input(struct jsm_channel *ch); void jsm_check_queue_flow_control(struct jsm_channel *ch); #endif
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