// SPDX-License-Identifier: GPL-2.0 /* *Copyright (C) 2011 LAPIS Semiconductor Co., Ltd. */ #include <linux/kernel.h> #include <linux/serial.h> #include <linux/serial_reg.h> #include <linux/slab.h> #include <linux/module.h> #include <linux/pci.h> #include <linux/console.h> #include <linux/serial_core.h> #include <linux/tty.h> #include <linux/tty_flip.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/dmi.h> #include <linux/nmi.h> #include <linux/delay.h> #include <linux/of.h> #include <linux/debugfs.h> #include <linux/dmaengine.h> #include <linux/pch_dma.h> enum { … }; #define PCH_UART_DRIVER_DEVICE … /* Set the max number of UART port * Intel EG20T PCH: 4 port * LAPIS Semiconductor ML7213 IOH: 3 port * LAPIS Semiconductor ML7223 IOH: 2 port */ #define PCH_UART_NR … #define PCH_UART_HANDLED_RX_INT … #define PCH_UART_HANDLED_TX_INT … #define PCH_UART_HANDLED_RX_ERR_INT … #define PCH_UART_HANDLED_RX_TRG_INT … #define PCH_UART_HANDLED_MS_INT … #define PCH_UART_HANDLED_LS_INT … #define PCH_UART_RBR … #define PCH_UART_THR … #define PCH_UART_IER_MASK … #define PCH_UART_IER_ERBFI … #define PCH_UART_IER_ETBEI … #define PCH_UART_IER_ELSI … #define PCH_UART_IER_EDSSI … #define PCH_UART_IIR_IP … #define PCH_UART_IIR_IID … #define PCH_UART_IIR_MSI … #define PCH_UART_IIR_TRI … #define PCH_UART_IIR_RRI … #define PCH_UART_IIR_REI … #define PCH_UART_IIR_TOI … #define PCH_UART_IIR_FIFO256 … #define PCH_UART_IIR_FIFO64 … #define PCH_UART_IIR_FE … #define PCH_UART_FCR_FIFOE … #define PCH_UART_FCR_RFR … #define PCH_UART_FCR_TFR … #define PCH_UART_FCR_DMS … #define PCH_UART_FCR_FIFO256 … #define PCH_UART_FCR_RFTL … #define PCH_UART_FCR_RFTL1 … #define PCH_UART_FCR_RFTL64 … #define PCH_UART_FCR_RFTL128 … #define PCH_UART_FCR_RFTL224 … #define PCH_UART_FCR_RFTL16 … #define PCH_UART_FCR_RFTL32 … #define PCH_UART_FCR_RFTL56 … #define PCH_UART_FCR_RFTL4 … #define PCH_UART_FCR_RFTL8 … #define PCH_UART_FCR_RFTL14 … #define PCH_UART_FCR_RFTL_SHIFT … #define PCH_UART_LCR_WLS … #define PCH_UART_LCR_STB … #define PCH_UART_LCR_PEN … #define PCH_UART_LCR_EPS … #define PCH_UART_LCR_SP … #define PCH_UART_LCR_SB … #define PCH_UART_LCR_DLAB … #define PCH_UART_LCR_NP … #define PCH_UART_LCR_OP … #define PCH_UART_LCR_EP … #define PCH_UART_LCR_1P … #define PCH_UART_LCR_0P … #define PCH_UART_LCR_5BIT … #define PCH_UART_LCR_6BIT … #define PCH_UART_LCR_7BIT … #define PCH_UART_LCR_8BIT … #define PCH_UART_MCR_DTR … #define PCH_UART_MCR_RTS … #define PCH_UART_MCR_OUT … #define PCH_UART_MCR_LOOP … #define PCH_UART_MCR_AFE … #define PCH_UART_LSR_DR … #define PCH_UART_LSR_ERR … #define PCH_UART_MSR_DCTS … #define PCH_UART_MSR_DDSR … #define PCH_UART_MSR_TERI … #define PCH_UART_MSR_DDCD … #define PCH_UART_MSR_CTS … #define PCH_UART_MSR_DSR … #define PCH_UART_MSR_RI … #define PCH_UART_MSR_DCD … #define PCH_UART_MSR_DELTA … #define PCH_UART_DLL … #define PCH_UART_DLM … #define PCH_UART_BRCSR … #define PCH_UART_IID_RLS … #define PCH_UART_IID_RDR … #define PCH_UART_IID_RDR_TO … #define PCH_UART_IID_THRE … #define PCH_UART_IID_MS … #define PCH_UART_HAL_PARITY_NONE … #define PCH_UART_HAL_PARITY_ODD … #define PCH_UART_HAL_PARITY_EVEN … #define PCH_UART_HAL_PARITY_FIX1 … #define PCH_UART_HAL_PARITY_FIX0 … #define PCH_UART_HAL_5BIT … #define PCH_UART_HAL_6BIT … #define PCH_UART_HAL_7BIT … #define PCH_UART_HAL_8BIT … #define PCH_UART_HAL_STB1 … #define PCH_UART_HAL_STB2 … #define PCH_UART_HAL_CLR_TX_FIFO … #define PCH_UART_HAL_CLR_RX_FIFO … #define PCH_UART_HAL_CLR_ALL_FIFO … #define PCH_UART_HAL_DMA_MODE0 … #define PCH_UART_HAL_FIFO_DIS … #define PCH_UART_HAL_FIFO16 … #define PCH_UART_HAL_FIFO256 … #define PCH_UART_HAL_FIFO64 … #define PCH_UART_HAL_TRIGGER1 … #define PCH_UART_HAL_TRIGGER64 … #define PCH_UART_HAL_TRIGGER128 … #define PCH_UART_HAL_TRIGGER224 … #define PCH_UART_HAL_TRIGGER16 … #define PCH_UART_HAL_TRIGGER32 … #define PCH_UART_HAL_TRIGGER56 … #define PCH_UART_HAL_TRIGGER4 … #define PCH_UART_HAL_TRIGGER8 … #define PCH_UART_HAL_TRIGGER14 … #define PCH_UART_HAL_TRIGGER_L … #define PCH_UART_HAL_TRIGGER_M … #define PCH_UART_HAL_TRIGGER_H … #define PCH_UART_HAL_RX_INT … #define PCH_UART_HAL_TX_INT … #define PCH_UART_HAL_RX_ERR_INT … #define PCH_UART_HAL_MS_INT … #define PCH_UART_HAL_ALL_INT … #define PCH_UART_HAL_DTR … #define PCH_UART_HAL_RTS … #define PCH_UART_HAL_OUT … #define PCH_UART_HAL_LOOP … #define PCH_UART_HAL_AFE … #define DEFAULT_UARTCLK … #define CMITC_UARTCLK … #define FRI2_64_UARTCLK … #define FRI2_48_UARTCLK … #define NTC1_UARTCLK … #define MINNOW_UARTCLK … struct pch_uart_buffer { … }; struct eg20t_port { … }; /** * struct pch_uart_driver_data - private data structure for UART-DMA * @port_type: The type of UART port * @line_no: UART port line number (0, 1, 2...) */ struct pch_uart_driver_data { … }; enum pch_uart_num_t { … }; static struct pch_uart_driver_data drv_dat[] = …; #ifdef CONFIG_SERIAL_PCH_UART_CONSOLE static struct eg20t_port *pch_uart_ports[PCH_UART_NR]; #endif static unsigned int default_baud = …; static unsigned int user_uartclk = …; static const int trigger_level_256[4] = …; static const int trigger_level_64[4] = …; static const int trigger_level_16[4] = …; static const int trigger_level_1[4] = …; #define PCH_REGS_BUFSIZE … static ssize_t port_show_regs(struct file *file, char __user *user_buf, size_t count, loff_t *ppos) { … } static const struct file_operations port_regs_ops = …; static const struct dmi_system_id pch_uart_dmi_table[] = …; /* Return UART clock, checking for board specific clocks. */ static unsigned int pch_uart_get_uartclk(void) { … } static void pch_uart_hal_enable_interrupt(struct eg20t_port *priv, unsigned int flag) { … } static void pch_uart_hal_disable_interrupt(struct eg20t_port *priv, unsigned int flag) { … } static int pch_uart_hal_set_line(struct eg20t_port *priv, unsigned int baud, unsigned int parity, unsigned int bits, unsigned int stb) { … } static int pch_uart_hal_fifo_reset(struct eg20t_port *priv, unsigned int flag) { … } static int pch_uart_hal_set_fifo(struct eg20t_port *priv, unsigned int dmamode, unsigned int fifo_size, unsigned int trigger) { … } static u8 pch_uart_hal_get_modem(struct eg20t_port *priv) { … } static int pch_uart_hal_read(struct eg20t_port *priv, unsigned char *buf, int rx_size) { … } static unsigned char pch_uart_hal_get_iid(struct eg20t_port *priv) { … } static u8 pch_uart_hal_get_line_status(struct eg20t_port *priv) { … } static void pch_uart_hal_set_break(struct eg20t_port *priv, int on) { … } static void push_rx(struct eg20t_port *priv, const unsigned char *buf, int size) { … } static int dma_push_rx(struct eg20t_port *priv, int size) { … } static void pch_free_dma(struct uart_port *port) { … } static bool filter(struct dma_chan *chan, void *slave) { … } static void pch_request_dma(struct uart_port *port) { … } static void pch_dma_rx_complete(void *arg) { … } static void pch_dma_tx_complete(void *arg) { … } static int handle_rx_to(struct eg20t_port *priv) { … } static int dma_handle_rx(struct eg20t_port *priv) { … } static unsigned int handle_tx(struct eg20t_port *priv) { … } static unsigned int dma_handle_tx(struct eg20t_port *priv) { … } static void pch_uart_err_ir(struct eg20t_port *priv, unsigned int lsr) { … } static irqreturn_t pch_uart_interrupt(int irq, void *dev_id) { … } /* This function tests whether the transmitter fifo and shifter for the port described by 'port' is empty. */ static unsigned int pch_uart_tx_empty(struct uart_port *port) { … } /* Returns the current state of modem control inputs. */ static unsigned int pch_uart_get_mctrl(struct uart_port *port) { … } static void pch_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) { … } static void pch_uart_stop_tx(struct uart_port *port) { … } static void pch_uart_start_tx(struct uart_port *port) { … } static void pch_uart_stop_rx(struct uart_port *port) { … } /* Enable the modem status interrupts. */ static void pch_uart_enable_ms(struct uart_port *port) { … } /* Control the transmission of a break signal. */ static void pch_uart_break_ctl(struct uart_port *port, int ctl) { … } /* Grab any interrupt resources and initialise any low level driver state. */ static int pch_uart_startup(struct uart_port *port) { … } static void pch_uart_shutdown(struct uart_port *port) { … } /* Change the port parameters, including word length, parity, stop *bits. Update read_status_mask and ignore_status_mask to indicate *the types of events we are interested in receiving. */ static void pch_uart_set_termios(struct uart_port *port, struct ktermios *termios, const struct ktermios *old) { … } static const char *pch_uart_type(struct uart_port *port) { … } static void pch_uart_release_port(struct uart_port *port) { … } static int pch_uart_request_port(struct uart_port *port) { … } static void pch_uart_config_port(struct uart_port *port, int type) { … } static int pch_uart_verify_port(struct uart_port *port, struct serial_struct *serinfo) { … } #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_PCH_UART_CONSOLE) /* * Wait for transmitter & holding register to empty */ static void wait_for_xmitr(struct eg20t_port *up, int bits) { … } #endif /* CONFIG_CONSOLE_POLL || CONFIG_SERIAL_PCH_UART_CONSOLE */ #ifdef CONFIG_CONSOLE_POLL /* * Console polling routines for communicate via uart while * in an interrupt or debug context. */ static int pch_uart_get_poll_char(struct uart_port *port) { … } static void pch_uart_put_poll_char(struct uart_port *port, unsigned char c) { … } #endif /* CONFIG_CONSOLE_POLL */ static const struct uart_ops pch_uart_ops = …; #ifdef CONFIG_SERIAL_PCH_UART_CONSOLE static void pch_console_putchar(struct uart_port *port, unsigned char ch) { … } /* * Print a string to the serial port trying not to disturb * any possible real use of the port... * * The console_lock must be held when we get here. */ static void pch_console_write(struct console *co, const char *s, unsigned int count) { … } static int __init pch_console_setup(struct console *co, char *options) { … } static struct uart_driver pch_uart_driver; static struct console pch_console = …; #define PCH_CONSOLE … #else #define PCH_CONSOLE … #endif /* CONFIG_SERIAL_PCH_UART_CONSOLE */ static struct uart_driver pch_uart_driver = …; static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev, const struct pci_device_id *id) { … } static void pch_uart_exit_port(struct eg20t_port *priv) { … } static void pch_uart_pci_remove(struct pci_dev *pdev) { … } static int __maybe_unused pch_uart_pci_suspend(struct device *dev) { … } static int __maybe_unused pch_uart_pci_resume(struct device *dev) { … } static const struct pci_device_id pch_uart_pci_id[] = …; static int pch_uart_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { … } static SIMPLE_DEV_PM_OPS(pch_uart_pci_pm_ops, pch_uart_pci_suspend, pch_uart_pci_resume); static struct pci_driver pch_uart_pci_driver = …; static int __init pch_uart_module_init(void) { … } module_init(…) …; static void __exit pch_uart_module_exit(void) { … } module_exit(pch_uart_module_exit); MODULE_LICENSE(…) …; MODULE_DESCRIPTION(…) …; MODULE_DEVICE_TABLE(pci, pch_uart_pci_id); module_param(default_baud, uint, S_IRUGO); MODULE_PARM_DESC(…) …; module_param(user_uartclk, uint, S_IRUGO); MODULE_PARM_DESC(…) …;
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