// SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2017-2018, The Linux foundation. All rights reserved. /* Disable MMIO tracing to prevent excessive logging of unwanted MMIO traces */ #define __DISABLE_TRACE_MMIO__ #include <linux/clk.h> #include <linux/console.h> #include <linux/io.h> #include <linux/iopoll.h> #include <linux/irq.h> #include <linux/module.h> #include <linux/of.h> #include <linux/pm_opp.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/pm_wakeirq.h> #include <linux/soc/qcom/geni-se.h> #include <linux/serial.h> #include <linux/serial_core.h> #include <linux/slab.h> #include <linux/tty.h> #include <linux/tty_flip.h> #include <dt-bindings/interconnect/qcom,icc.h> /* UART specific GENI registers */ #define SE_UART_LOOPBACK_CFG … #define SE_UART_IO_MACRO_CTRL … #define SE_UART_TX_TRANS_CFG … #define SE_UART_TX_WORD_LEN … #define SE_UART_TX_STOP_BIT_LEN … #define SE_UART_TX_TRANS_LEN … #define SE_UART_RX_TRANS_CFG … #define SE_UART_RX_WORD_LEN … #define SE_UART_RX_STALE_CNT … #define SE_UART_TX_PARITY_CFG … #define SE_UART_RX_PARITY_CFG … #define SE_UART_MANUAL_RFR … /* SE_UART_TRANS_CFG */ #define UART_TX_PAR_EN … #define UART_CTS_MASK … /* SE_UART_TX_STOP_BIT_LEN */ #define TX_STOP_BIT_LEN_1 … #define TX_STOP_BIT_LEN_2 … /* SE_UART_RX_TRANS_CFG */ #define UART_RX_PAR_EN … /* SE_UART_RX_WORD_LEN */ #define RX_WORD_LEN_MASK … /* SE_UART_RX_STALE_CNT */ #define RX_STALE_CNT … /* SE_UART_TX_PARITY_CFG/RX_PARITY_CFG */ #define PAR_CALC_EN … #define PAR_EVEN … #define PAR_ODD … #define PAR_SPACE … /* SE_UART_MANUAL_RFR register fields */ #define UART_MANUAL_RFR_EN … #define UART_RFR_NOT_READY … #define UART_RFR_READY … /* UART M_CMD OP codes */ #define UART_START_TX … /* UART S_CMD OP codes */ #define UART_START_READ … #define UART_PARAM … #define UART_PARAM_RFR_OPEN … #define UART_OVERSAMPLING … #define STALE_TIMEOUT … #define DEFAULT_BITS_PER_CHAR … #define GENI_UART_CONS_PORTS … #define GENI_UART_PORTS … #define DEF_FIFO_DEPTH_WORDS … #define DEF_TX_WM … #define DEF_FIFO_WIDTH_BITS … #define UART_RX_WM … /* SE_UART_LOOPBACK_CFG */ #define RX_TX_SORTED … #define CTS_RTS_SORTED … #define RX_TX_CTS_RTS_SORTED … /* UART pin swap value */ #define DEFAULT_IO_MACRO_IO0_IO1_MASK … #define IO_MACRO_IO0_SEL … #define DEFAULT_IO_MACRO_IO2_IO3_MASK … #define IO_MACRO_IO2_IO3_SWAP … /* We always configure 4 bytes per FIFO word */ #define BYTES_PER_FIFO_WORD … #define DMA_RX_BUF_SIZE … struct qcom_geni_device_data { … }; struct qcom_geni_private_data { … }; struct qcom_geni_serial_port { … }; static const struct uart_ops qcom_geni_console_pops; static const struct uart_ops qcom_geni_uart_pops; static struct uart_driver qcom_geni_console_driver; static struct uart_driver qcom_geni_uart_driver; static void __qcom_geni_serial_cancel_tx_cmd(struct uart_port *uport); static void qcom_geni_serial_cancel_tx_cmd(struct uart_port *uport); static int qcom_geni_serial_port_setup(struct uart_port *uport); static inline struct qcom_geni_serial_port *to_dev_port(struct uart_port *uport) { … } static struct qcom_geni_serial_port qcom_geni_uart_ports[GENI_UART_PORTS] = …; static struct qcom_geni_serial_port qcom_geni_console_port = …; static int qcom_geni_serial_request_port(struct uart_port *uport) { … } static void qcom_geni_serial_config_port(struct uart_port *uport, int cfg_flags) { … } static unsigned int qcom_geni_serial_get_mctrl(struct uart_port *uport) { … } static void qcom_geni_serial_set_mctrl(struct uart_port *uport, unsigned int mctrl) { … } static const char *qcom_geni_serial_get_type(struct uart_port *uport) { … } static struct qcom_geni_serial_port *get_port_from_line(int line, bool console) { … } static bool qcom_geni_serial_main_active(struct uart_port *uport) { … } static bool qcom_geni_serial_secondary_active(struct uart_port *uport) { … } static bool qcom_geni_serial_poll_bitfield(struct uart_port *uport, unsigned int offset, u32 field, u32 val) { … } static bool qcom_geni_serial_poll_bit(struct uart_port *uport, unsigned int offset, u32 field, bool set) { … } static void qcom_geni_serial_setup_tx(struct uart_port *uport, u32 xmit_size) { … } static void qcom_geni_serial_poll_tx_done(struct uart_port *uport) { … } static void qcom_geni_serial_abort_rx(struct uart_port *uport) { … } #ifdef CONFIG_CONSOLE_POLL static int qcom_geni_serial_get_char(struct uart_port *uport) { … } static void qcom_geni_serial_poll_put_char(struct uart_port *uport, unsigned char c) { … } static int qcom_geni_serial_poll_init(struct uart_port *uport) { … } #endif #ifdef CONFIG_SERIAL_QCOM_GENI_CONSOLE static void qcom_geni_serial_drain_fifo(struct uart_port *uport) { … } static void qcom_geni_serial_wr_char(struct uart_port *uport, unsigned char ch) { … } static void __qcom_geni_serial_console_write(struct uart_port *uport, const char *s, unsigned int count) { … } static void qcom_geni_serial_console_write(struct console *co, const char *s, unsigned int count) { … } static void handle_rx_console(struct uart_port *uport, u32 bytes, bool drop) { … } #else static void handle_rx_console(struct uart_port *uport, u32 bytes, bool drop) { } #endif /* CONFIG_SERIAL_QCOM_GENI_CONSOLE */ static void handle_rx_uart(struct uart_port *uport, u32 bytes) { … } static unsigned int qcom_geni_serial_tx_empty(struct uart_port *uport) { … } static void qcom_geni_serial_stop_tx_dma(struct uart_port *uport) { … } static void qcom_geni_serial_start_tx_dma(struct uart_port *uport) { … } static void qcom_geni_serial_start_tx_fifo(struct uart_port *uport) { … } static void qcom_geni_serial_stop_tx_fifo(struct uart_port *uport) { … } static void __qcom_geni_serial_cancel_tx_cmd(struct uart_port *uport) { … } static void qcom_geni_serial_cancel_tx_cmd(struct uart_port *uport) { … } static void qcom_geni_serial_handle_rx_fifo(struct uart_port *uport, bool drop) { … } static void qcom_geni_serial_stop_rx_fifo(struct uart_port *uport) { … } static void qcom_geni_serial_start_rx_fifo(struct uart_port *uport) { … } static void qcom_geni_serial_stop_rx_dma(struct uart_port *uport) { … } static void qcom_geni_serial_start_rx_dma(struct uart_port *uport) { … } static void qcom_geni_serial_handle_rx_dma(struct uart_port *uport, bool drop) { … } static void qcom_geni_serial_start_rx(struct uart_port *uport) { … } static void qcom_geni_serial_stop_rx(struct uart_port *uport) { … } static void qcom_geni_serial_stop_tx(struct uart_port *uport) { … } static void qcom_geni_serial_send_chunk_fifo(struct uart_port *uport, unsigned int chunk) { … } static void qcom_geni_serial_handle_tx_fifo(struct uart_port *uport, bool done, bool active) { … } static void qcom_geni_serial_handle_tx_dma(struct uart_port *uport) { … } static irqreturn_t qcom_geni_serial_isr(int isr, void *dev) { … } static int setup_fifos(struct qcom_geni_serial_port *port) { … } static void qcom_geni_serial_shutdown(struct uart_port *uport) { … } static void qcom_geni_serial_flush_buffer(struct uart_port *uport) { … } static int qcom_geni_serial_port_setup(struct uart_port *uport) { … } static int qcom_geni_serial_startup(struct uart_port *uport) { … } static unsigned long find_clk_rate_in_tol(struct clk *clk, unsigned int desired_clk, unsigned int *clk_div, unsigned int percent_tol) { … } static unsigned long get_clk_div_rate(struct clk *clk, unsigned int baud, unsigned int sampling_rate, unsigned int *clk_div) { … } static void qcom_geni_serial_set_termios(struct uart_port *uport, struct ktermios *termios, const struct ktermios *old) { … } #ifdef CONFIG_SERIAL_QCOM_GENI_CONSOLE static int qcom_geni_console_setup(struct console *co, char *options) { … } static void qcom_geni_serial_earlycon_write(struct console *con, const char *s, unsigned int n) { … } #ifdef CONFIG_CONSOLE_POLL static int qcom_geni_serial_earlycon_read(struct console *con, char *s, unsigned int n) { … } static void __init qcom_geni_serial_enable_early_read(struct geni_se *se, struct console *con) { … } #else static inline void qcom_geni_serial_enable_early_read(struct geni_se *se, struct console *con) { } #endif static struct qcom_geni_private_data earlycon_private_data; static int __init qcom_geni_serial_earlycon_setup(struct earlycon_device *dev, const char *opt) { … } OF_EARLYCON_DECLARE(…); static int __init console_register(struct uart_driver *drv) { … } static void console_unregister(struct uart_driver *drv) { … } static struct console cons_ops = …; static struct uart_driver qcom_geni_console_driver = …; #else static int console_register(struct uart_driver *drv) { return 0; } static void console_unregister(struct uart_driver *drv) { } #endif /* CONFIG_SERIAL_QCOM_GENI_CONSOLE */ static struct uart_driver qcom_geni_uart_driver = …; static void qcom_geni_serial_pm(struct uart_port *uport, unsigned int new_state, unsigned int old_state) { … } static const struct uart_ops qcom_geni_console_pops = …; static const struct uart_ops qcom_geni_uart_pops = …; static int qcom_geni_serial_probe(struct platform_device *pdev) { … } static void qcom_geni_serial_remove(struct platform_device *pdev) { … } static int qcom_geni_serial_suspend(struct device *dev) { … } static int qcom_geni_serial_resume(struct device *dev) { … } static const struct qcom_geni_device_data qcom_geni_console_data = …; static const struct qcom_geni_device_data qcom_geni_uart_data = …; static const struct dev_pm_ops qcom_geni_serial_pm_ops = …; static const struct of_device_id qcom_geni_serial_match_table[] = …; MODULE_DEVICE_TABLE(of, qcom_geni_serial_match_table); static struct platform_driver qcom_geni_serial_platform_driver = …; static int __init qcom_geni_serial_init(void) { … } module_init(…) …; static void __exit qcom_geni_serial_exit(void) { … } module_exit(qcom_geni_serial_exit); MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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