/* * RNG driver for Intel RNGs * * Copyright 2005 (c) MontaVista Software, Inc. * * with the majority of the code coming from: * * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG) * (c) Copyright 2003 Red Hat Inc <[email protected]> * * derived from * * Hardware driver for the AMD 768 Random Number Generator (RNG) * (c) Copyright 2001 Red Hat Inc * * derived from * * Hardware driver for Intel i810 Random Number Generator (RNG) * Copyright 2000,2001 Jeff Garzik <[email protected]> * Copyright 2000,2001 Philipp Rumpf <[email protected]> * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without any * warranty of any kind, whether express or implied. */ #include <linux/hw_random.h> #include <linux/io.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/pci.h> #include <linux/stop_machine.h> #include <linux/delay.h> #include <linux/slab.h> #define PFX … /* * RNG registers */ #define INTEL_RNG_HW_STATUS … #define INTEL_RNG_PRESENT … #define INTEL_RNG_ENABLED … #define INTEL_RNG_STATUS … #define INTEL_RNG_DATA_PRESENT … #define INTEL_RNG_DATA … /* * Magic address at which Intel PCI bridges locate the RNG */ #define INTEL_RNG_ADDR … #define INTEL_RNG_ADDR_LEN … /* * LPC bridge PCI config space registers */ #define FWH_DEC_EN1_REG_OLD … #define FWH_DEC_EN1_REG_NEW … #define FWH_F8_EN_MASK … #define BIOS_CNTL_REG_OLD … #define BIOS_CNTL_REG_NEW … #define BIOS_CNTL_WRITE_ENABLE_MASK … #define BIOS_CNTL_LOCK_ENABLE_MASK … /* * Magic address at which Intel Firmware Hubs get accessed */ #define INTEL_FWH_ADDR … #define INTEL_FWH_ADDR_LEN … /* * Intel Firmware Hub command codes (write to any address inside the device) */ #define INTEL_FWH_RESET_CMD … #define INTEL_FWH_READ_ID_CMD … /* * Intel Firmware Hub Read ID command result addresses */ #define INTEL_FWH_MANUFACTURER_CODE_ADDRESS … #define INTEL_FWH_DEVICE_CODE_ADDRESS … /* * Intel Firmware Hub Read ID command result values */ #define INTEL_FWH_MANUFACTURER_CODE … #define INTEL_FWH_DEVICE_CODE_8M … #define INTEL_FWH_DEVICE_CODE_4M … /* * Data for PCI driver interface * * This data only exists for exporting the supported * PCI ids via MODULE_DEVICE_TABLE. We do not actually * register a pci_driver, because someone else might one day * want to register another driver on the same PCI id. */ static const struct pci_device_id pci_tbl[] = …; MODULE_DEVICE_TABLE(pci, pci_tbl); static __initdata int no_fwh_detect; module_param(no_fwh_detect, int, 0); MODULE_PARM_DESC(…) …; static inline u8 hwstatus_get(void __iomem *mem) { … } static inline u8 hwstatus_set(void __iomem *mem, u8 hw_status) { … } static int intel_rng_data_present(struct hwrng *rng, int wait) { … } static int intel_rng_data_read(struct hwrng *rng, u32 *data) { … } static int intel_rng_init(struct hwrng *rng) { … } static void intel_rng_cleanup(struct hwrng *rng) { … } static struct hwrng intel_rng = …; struct intel_rng_hw { … }; static int __init intel_rng_hw_init(void *_intel_rng_hw) { … } static int __init intel_init_hw_struct(struct intel_rng_hw *intel_rng_hw, struct pci_dev *dev) { … } static int __init intel_rng_mod_init(void) { … } static void __exit intel_rng_mod_exit(void) { … } module_init(…) …; module_exit(intel_rng_mod_exit); MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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