/* SPDX-License-Identifier: GPL-2.0 */ /* * Common Intel AGPGART and GTT definitions. */ #ifndef _INTEL_AGP_H #define _INTEL_AGP_H /* Intel registers */ #define INTEL_APSIZE … #define INTEL_ATTBASE … #define INTEL_AGPCTRL … #define INTEL_NBXCFG … #define INTEL_ERRSTS … /* Intel i830 registers */ #define I830_GMCH_CTRL … #define I830_GMCH_ENABLED … #define I830_GMCH_MEM_MASK … #define I830_GMCH_MEM_64M … #define I830_GMCH_MEM_128M … #define I830_GMCH_GMS_MASK … #define I830_GMCH_GMS_DISABLED … #define I830_GMCH_GMS_LOCAL … #define I830_GMCH_GMS_STOLEN_512 … #define I830_GMCH_GMS_STOLEN_1024 … #define I830_GMCH_GMS_STOLEN_8192 … #define I830_RDRAM_CHANNEL_TYPE … #define I830_RDRAM_ND(x) … #define I830_RDRAM_DDT(x) … /* This one is for I830MP w. an external graphic card */ #define INTEL_I830_ERRSTS … /* Intel 855GM/852GM registers */ #define I855_GMCH_GMS_MASK … #define I855_GMCH_GMS_STOLEN_0M … #define I855_GMCH_GMS_STOLEN_1M … #define I855_GMCH_GMS_STOLEN_4M … #define I855_GMCH_GMS_STOLEN_8M … #define I855_GMCH_GMS_STOLEN_16M … #define I855_GMCH_GMS_STOLEN_32M … #define I85X_CAPID … #define I85X_VARIANT_MASK … #define I85X_VARIANT_SHIFT … #define I855_GME … #define I855_GM … #define I852_GME … #define I852_GM … /* Intel i845 registers */ #define INTEL_I845_AGPM … #define INTEL_I845_ERRSTS … /* Intel i860 registers */ #define INTEL_I860_MCHCFG … #define INTEL_I860_ERRSTS … /* Intel i810 registers */ #define I810_GMADR_BAR … #define I810_MMADR_BAR … #define I810_PTE_BASE … #define I810_PTE_MAIN_UNCACHED … #define I810_PTE_LOCAL … #define I810_PTE_VALID … #define I830_PTE_SYSTEM_CACHED … #define I810_SMRAM_MISCC … #define I810_GFX_MEM_WIN_SIZE … #define I810_GFX_MEM_WIN_32M … #define I810_GMS … #define I810_GMS_DISABLE … #define I810_PGETBL_CTL … #define I810_PGETBL_ENABLED … /* Note: PGETBL_CTL2 has a different offset on G33. */ #define I965_PGETBL_CTL2 … #define I965_PGETBL_SIZE_MASK … #define I965_PGETBL_SIZE_512KB … #define I965_PGETBL_SIZE_256KB … #define I965_PGETBL_SIZE_128KB … #define I965_PGETBL_SIZE_1MB … #define I965_PGETBL_SIZE_2MB … #define I965_PGETBL_SIZE_1_5MB … #define G33_GMCH_SIZE_MASK … #define G33_GMCH_SIZE_1M … #define G33_GMCH_SIZE_2M … #define G4x_GMCH_SIZE_MASK … #define G4x_GMCH_SIZE_1M … #define G4x_GMCH_SIZE_2M … #define G4x_GMCH_SIZE_VT_EN … #define G4x_GMCH_SIZE_VT_1M … #define G4x_GMCH_SIZE_VT_1_5M … #define G4x_GMCH_SIZE_VT_2M … #define GFX_FLSH_CNTL … #define I810_DRAM_CTL … #define I810_DRAM_ROW_0 … #define I810_DRAM_ROW_0_SDRAM … /* Intel 815 register */ #define INTEL_815_APCONT … #define INTEL_815_ATTBASE_MASK … /* Intel i820 registers */ #define INTEL_I820_RDCR … #define INTEL_I820_ERRSTS … /* Intel i840 registers */ #define INTEL_I840_MCHCFG … #define INTEL_I840_ERRSTS … /* Intel i850 registers */ #define INTEL_I850_MCHCFG … #define INTEL_I850_ERRSTS … /* intel 915G registers */ #define I915_GMADR_BAR … #define I915_MMADR_BAR … #define I915_PTE_BAR … #define I915_GMCH_GMS_STOLEN_48M … #define I915_GMCH_GMS_STOLEN_64M … #define G33_GMCH_GMS_STOLEN_128M … #define G33_GMCH_GMS_STOLEN_256M … #define INTEL_GMCH_GMS_STOLEN_96M … #define INTEL_GMCH_GMS_STOLEN_160M … #define INTEL_GMCH_GMS_STOLEN_224M … #define INTEL_GMCH_GMS_STOLEN_352M … #define I915_IFPADDR … #define I830_HIC … /* Intel 965G registers */ #define I965_MSAC … #define I965_IFPADDR … /* Intel 7505 registers */ #define INTEL_I7505_APSIZE … #define INTEL_I7505_NCAPID … #define INTEL_I7505_NISTAT … #define INTEL_I7505_ATTBASE … #define INTEL_I7505_ERRSTS … #define INTEL_I7505_AGPCTRL … #define INTEL_I7505_MCHCFG … /* pci devices ids */ #define PCI_DEVICE_ID_INTEL_E7221_HB … #define PCI_DEVICE_ID_INTEL_E7221_IG … #define PCI_DEVICE_ID_INTEL_82946GZ_HB … #define PCI_DEVICE_ID_INTEL_82946GZ_IG … #define PCI_DEVICE_ID_INTEL_82G35_HB … #define PCI_DEVICE_ID_INTEL_82G35_IG … #define PCI_DEVICE_ID_INTEL_82965Q_HB … #define PCI_DEVICE_ID_INTEL_82965Q_IG … #define PCI_DEVICE_ID_INTEL_82965G_HB … #define PCI_DEVICE_ID_INTEL_82965G_IG … #define PCI_DEVICE_ID_INTEL_82965GM_HB … #define PCI_DEVICE_ID_INTEL_82965GM_IG … #define PCI_DEVICE_ID_INTEL_82965GME_HB … #define PCI_DEVICE_ID_INTEL_82965GME_IG … #define PCI_DEVICE_ID_INTEL_82945GME_HB … #define PCI_DEVICE_ID_INTEL_82945GME_IG … #define PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB … #define PCI_DEVICE_ID_INTEL_PINEVIEW_M_IG … #define PCI_DEVICE_ID_INTEL_PINEVIEW_HB … #define PCI_DEVICE_ID_INTEL_PINEVIEW_IG … #define PCI_DEVICE_ID_INTEL_G33_HB … #define PCI_DEVICE_ID_INTEL_G33_IG … #define PCI_DEVICE_ID_INTEL_Q35_HB … #define PCI_DEVICE_ID_INTEL_Q35_IG … #define PCI_DEVICE_ID_INTEL_Q33_HB … #define PCI_DEVICE_ID_INTEL_Q33_IG … #define PCI_DEVICE_ID_INTEL_B43_HB … #define PCI_DEVICE_ID_INTEL_B43_IG … #define PCI_DEVICE_ID_INTEL_B43_1_HB … #define PCI_DEVICE_ID_INTEL_B43_1_IG … #define PCI_DEVICE_ID_INTEL_GM45_HB … #define PCI_DEVICE_ID_INTEL_GM45_IG … #define PCI_DEVICE_ID_INTEL_EAGLELAKE_HB … #define PCI_DEVICE_ID_INTEL_EAGLELAKE_IG … #define PCI_DEVICE_ID_INTEL_Q45_HB … #define PCI_DEVICE_ID_INTEL_Q45_IG … #define PCI_DEVICE_ID_INTEL_G45_HB … #define PCI_DEVICE_ID_INTEL_G45_IG … #define PCI_DEVICE_ID_INTEL_G41_HB … #define PCI_DEVICE_ID_INTEL_G41_IG … #define PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB … #define PCI_DEVICE_ID_INTEL_IRONLAKE_D2_HB … #define PCI_DEVICE_ID_INTEL_IRONLAKE_D_IG … #define PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB … #define PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB … #define PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB … #define PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG … #endif
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