linux/drivers/gpu/drm/amd/include/asic_reg/mp/mp_9_0_offset.h

/*
 * Copyright (C) 2017  Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included
 * in all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
#ifndef _mp_9_0_OFFSET_HEADER
#define _mp_9_0_OFFSET_HEADER



// addressBlock: mp_SmuMp0_SmnDec
// base address:	0x0
#define mmMP0_SMN_C2PMSG_32
#define mmMP0_SMN_C2PMSG_32_BASE_IDX
#define mmMP0_SMN_C2PMSG_33
#define mmMP0_SMN_C2PMSG_33_BASE_IDX
#define mmMP0_SMN_C2PMSG_34
#define mmMP0_SMN_C2PMSG_34_BASE_IDX
#define mmMP0_SMN_C2PMSG_35
#define mmMP0_SMN_C2PMSG_35_BASE_IDX
#define mmMP0_SMN_C2PMSG_36
#define mmMP0_SMN_C2PMSG_36_BASE_IDX
#define mmMP0_SMN_C2PMSG_37
#define mmMP0_SMN_C2PMSG_37_BASE_IDX
#define mmMP0_SMN_C2PMSG_38
#define mmMP0_SMN_C2PMSG_38_BASE_IDX
#define mmMP0_SMN_C2PMSG_39
#define mmMP0_SMN_C2PMSG_39_BASE_IDX
#define mmMP0_SMN_C2PMSG_40
#define mmMP0_SMN_C2PMSG_40_BASE_IDX
#define mmMP0_SMN_C2PMSG_41
#define mmMP0_SMN_C2PMSG_41_BASE_IDX
#define mmMP0_SMN_C2PMSG_42
#define mmMP0_SMN_C2PMSG_42_BASE_IDX
#define mmMP0_SMN_C2PMSG_43
#define mmMP0_SMN_C2PMSG_43_BASE_IDX
#define mmMP0_SMN_C2PMSG_44
#define mmMP0_SMN_C2PMSG_44_BASE_IDX
#define mmMP0_SMN_C2PMSG_45
#define mmMP0_SMN_C2PMSG_45_BASE_IDX
#define mmMP0_SMN_C2PMSG_46
#define mmMP0_SMN_C2PMSG_46_BASE_IDX
#define mmMP0_SMN_C2PMSG_47
#define mmMP0_SMN_C2PMSG_47_BASE_IDX
#define mmMP0_SMN_C2PMSG_48
#define mmMP0_SMN_C2PMSG_48_BASE_IDX
#define mmMP0_SMN_C2PMSG_49
#define mmMP0_SMN_C2PMSG_49_BASE_IDX
#define mmMP0_SMN_C2PMSG_50
#define mmMP0_SMN_C2PMSG_50_BASE_IDX
#define mmMP0_SMN_C2PMSG_51
#define mmMP0_SMN_C2PMSG_51_BASE_IDX
#define mmMP0_SMN_C2PMSG_52
#define mmMP0_SMN_C2PMSG_52_BASE_IDX
#define mmMP0_SMN_C2PMSG_53
#define mmMP0_SMN_C2PMSG_53_BASE_IDX
#define mmMP0_SMN_C2PMSG_54
#define mmMP0_SMN_C2PMSG_54_BASE_IDX
#define mmMP0_SMN_C2PMSG_55
#define mmMP0_SMN_C2PMSG_55_BASE_IDX
#define mmMP0_SMN_C2PMSG_56
#define mmMP0_SMN_C2PMSG_56_BASE_IDX
#define mmMP0_SMN_C2PMSG_57
#define mmMP0_SMN_C2PMSG_57_BASE_IDX
#define mmMP0_SMN_C2PMSG_58
#define mmMP0_SMN_C2PMSG_58_BASE_IDX
#define mmMP0_SMN_C2PMSG_59
#define mmMP0_SMN_C2PMSG_59_BASE_IDX
#define mmMP0_SMN_C2PMSG_60
#define mmMP0_SMN_C2PMSG_60_BASE_IDX
#define mmMP0_SMN_C2PMSG_61
#define mmMP0_SMN_C2PMSG_61_BASE_IDX
#define mmMP0_SMN_C2PMSG_62
#define mmMP0_SMN_C2PMSG_62_BASE_IDX
#define mmMP0_SMN_C2PMSG_63
#define mmMP0_SMN_C2PMSG_63_BASE_IDX
#define mmMP0_SMN_C2PMSG_64
#define mmMP0_SMN_C2PMSG_64_BASE_IDX
#define mmMP0_SMN_C2PMSG_65
#define mmMP0_SMN_C2PMSG_65_BASE_IDX
#define mmMP0_SMN_C2PMSG_66
#define mmMP0_SMN_C2PMSG_66_BASE_IDX
#define mmMP0_SMN_C2PMSG_67
#define mmMP0_SMN_C2PMSG_67_BASE_IDX
#define mmMP0_SMN_C2PMSG_68
#define mmMP0_SMN_C2PMSG_68_BASE_IDX
#define mmMP0_SMN_C2PMSG_69
#define mmMP0_SMN_C2PMSG_69_BASE_IDX
#define mmMP0_SMN_C2PMSG_70
#define mmMP0_SMN_C2PMSG_70_BASE_IDX
#define mmMP0_SMN_C2PMSG_71
#define mmMP0_SMN_C2PMSG_71_BASE_IDX
#define mmMP0_SMN_C2PMSG_72
#define mmMP0_SMN_C2PMSG_72_BASE_IDX
#define mmMP0_SMN_C2PMSG_73
#define mmMP0_SMN_C2PMSG_73_BASE_IDX
#define mmMP0_SMN_C2PMSG_74
#define mmMP0_SMN_C2PMSG_74_BASE_IDX
#define mmMP0_SMN_C2PMSG_75
#define mmMP0_SMN_C2PMSG_75_BASE_IDX
#define mmMP0_SMN_C2PMSG_76
#define mmMP0_SMN_C2PMSG_76_BASE_IDX
#define mmMP0_SMN_C2PMSG_77
#define mmMP0_SMN_C2PMSG_77_BASE_IDX
#define mmMP0_SMN_C2PMSG_78
#define mmMP0_SMN_C2PMSG_78_BASE_IDX
#define mmMP0_SMN_C2PMSG_79
#define mmMP0_SMN_C2PMSG_79_BASE_IDX
#define mmMP0_SMN_C2PMSG_80
#define mmMP0_SMN_C2PMSG_80_BASE_IDX
#define mmMP0_SMN_C2PMSG_81
#define mmMP0_SMN_C2PMSG_81_BASE_IDX
#define mmMP0_SMN_C2PMSG_82
#define mmMP0_SMN_C2PMSG_82_BASE_IDX
#define mmMP0_SMN_C2PMSG_83
#define mmMP0_SMN_C2PMSG_83_BASE_IDX
#define mmMP0_SMN_C2PMSG_84
#define mmMP0_SMN_C2PMSG_84_BASE_IDX
#define mmMP0_SMN_C2PMSG_85
#define mmMP0_SMN_C2PMSG_85_BASE_IDX
#define mmMP0_SMN_C2PMSG_86
#define mmMP0_SMN_C2PMSG_86_BASE_IDX
#define mmMP0_SMN_C2PMSG_87
#define mmMP0_SMN_C2PMSG_87_BASE_IDX
#define mmMP0_SMN_C2PMSG_88
#define mmMP0_SMN_C2PMSG_88_BASE_IDX
#define mmMP0_SMN_C2PMSG_89
#define mmMP0_SMN_C2PMSG_89_BASE_IDX
#define mmMP0_SMN_C2PMSG_90
#define mmMP0_SMN_C2PMSG_90_BASE_IDX
#define mmMP0_SMN_C2PMSG_91
#define mmMP0_SMN_C2PMSG_91_BASE_IDX
#define mmMP0_SMN_C2PMSG_92
#define mmMP0_SMN_C2PMSG_92_BASE_IDX
#define mmMP0_SMN_C2PMSG_93
#define mmMP0_SMN_C2PMSG_93_BASE_IDX
#define mmMP0_SMN_C2PMSG_94
#define mmMP0_SMN_C2PMSG_94_BASE_IDX
#define mmMP0_SMN_C2PMSG_95
#define mmMP0_SMN_C2PMSG_95_BASE_IDX
#define mmMP0_SMN_C2PMSG_96
#define mmMP0_SMN_C2PMSG_96_BASE_IDX
#define mmMP0_SMN_C2PMSG_97
#define mmMP0_SMN_C2PMSG_97_BASE_IDX
#define mmMP0_SMN_C2PMSG_98
#define mmMP0_SMN_C2PMSG_98_BASE_IDX
#define mmMP0_SMN_C2PMSG_99
#define mmMP0_SMN_C2PMSG_99_BASE_IDX
#define mmMP0_SMN_C2PMSG_100
#define mmMP0_SMN_C2PMSG_100_BASE_IDX
#define mmMP0_SMN_C2PMSG_101
#define mmMP0_SMN_C2PMSG_101_BASE_IDX
#define mmMP0_SMN_C2PMSG_102
#define mmMP0_SMN_C2PMSG_102_BASE_IDX
#define mmMP0_SMN_C2PMSG_103
#define mmMP0_SMN_C2PMSG_103_BASE_IDX
#define mmMP0_SMN_ACTIVE_FCN_ID
#define mmMP0_SMN_ACTIVE_FCN_ID_BASE_IDX
#define mmMP0_SMN_IH_CREDIT
#define mmMP0_SMN_IH_CREDIT_BASE_IDX
#define mmMP0_SMN_IH_SW_INT
#define mmMP0_SMN_IH_SW_INT_BASE_IDX
#define mmMP0_SMN_IH_SW_INT_CTRL
#define mmMP0_SMN_IH_SW_INT_CTRL_BASE_IDX


// addressBlock: mp_SmuMp1_SmnDec
// base address:	0x0
#define mmMP1_SMN_ACP2MP_RESP
#define mmMP1_SMN_ACP2MP_RESP_BASE_IDX
#define mmMP1_SMN_DC2MP_RESP
#define mmMP1_SMN_DC2MP_RESP_BASE_IDX
#define mmMP1_SMN_UVD2MP_RESP
#define mmMP1_SMN_UVD2MP_RESP_BASE_IDX
#define mmMP1_SMN_VCE2MP_RESP
#define mmMP1_SMN_VCE2MP_RESP_BASE_IDX
#define mmMP1_SMN_RLC2MP_RESP
#define mmMP1_SMN_RLC2MP_RESP_BASE_IDX
#define mmMP1_SMN_C2PMSG_32
#define mmMP1_SMN_C2PMSG_32_BASE_IDX
#define mmMP1_SMN_C2PMSG_33
#define mmMP1_SMN_C2PMSG_33_BASE_IDX
#define mmMP1_SMN_C2PMSG_34
#define mmMP1_SMN_C2PMSG_34_BASE_IDX
#define mmMP1_SMN_C2PMSG_35
#define mmMP1_SMN_C2PMSG_35_BASE_IDX
#define mmMP1_SMN_C2PMSG_36
#define mmMP1_SMN_C2PMSG_36_BASE_IDX
#define mmMP1_SMN_C2PMSG_37
#define mmMP1_SMN_C2PMSG_37_BASE_IDX
#define mmMP1_SMN_C2PMSG_38
#define mmMP1_SMN_C2PMSG_38_BASE_IDX
#define mmMP1_SMN_C2PMSG_39
#define mmMP1_SMN_C2PMSG_39_BASE_IDX
#define mmMP1_SMN_C2PMSG_40
#define mmMP1_SMN_C2PMSG_40_BASE_IDX
#define mmMP1_SMN_C2PMSG_41
#define mmMP1_SMN_C2PMSG_41_BASE_IDX
#define mmMP1_SMN_C2PMSG_42
#define mmMP1_SMN_C2PMSG_42_BASE_IDX
#define mmMP1_SMN_C2PMSG_43
#define mmMP1_SMN_C2PMSG_43_BASE_IDX
#define mmMP1_SMN_C2PMSG_44
#define mmMP1_SMN_C2PMSG_44_BASE_IDX
#define mmMP1_SMN_C2PMSG_45
#define mmMP1_SMN_C2PMSG_45_BASE_IDX
#define mmMP1_SMN_C2PMSG_46
#define mmMP1_SMN_C2PMSG_46_BASE_IDX
#define mmMP1_SMN_C2PMSG_47
#define mmMP1_SMN_C2PMSG_47_BASE_IDX
#define mmMP1_SMN_C2PMSG_48
#define mmMP1_SMN_C2PMSG_48_BASE_IDX
#define mmMP1_SMN_C2PMSG_49
#define mmMP1_SMN_C2PMSG_49_BASE_IDX
#define mmMP1_SMN_C2PMSG_50
#define mmMP1_SMN_C2PMSG_50_BASE_IDX
#define mmMP1_SMN_C2PMSG_51
#define mmMP1_SMN_C2PMSG_51_BASE_IDX
#define mmMP1_SMN_C2PMSG_52
#define mmMP1_SMN_C2PMSG_52_BASE_IDX
#define mmMP1_SMN_C2PMSG_53
#define mmMP1_SMN_C2PMSG_53_BASE_IDX
#define mmMP1_SMN_C2PMSG_54
#define mmMP1_SMN_C2PMSG_54_BASE_IDX
#define mmMP1_SMN_C2PMSG_55
#define mmMP1_SMN_C2PMSG_55_BASE_IDX
#define mmMP1_SMN_C2PMSG_56
#define mmMP1_SMN_C2PMSG_56_BASE_IDX
#define mmMP1_SMN_C2PMSG_57
#define mmMP1_SMN_C2PMSG_57_BASE_IDX
#define mmMP1_SMN_C2PMSG_58
#define mmMP1_SMN_C2PMSG_58_BASE_IDX
#define mmMP1_SMN_C2PMSG_59
#define mmMP1_SMN_C2PMSG_59_BASE_IDX
#define mmMP1_SMN_C2PMSG_60
#define mmMP1_SMN_C2PMSG_60_BASE_IDX
#define mmMP1_SMN_C2PMSG_61
#define mmMP1_SMN_C2PMSG_61_BASE_IDX
#define mmMP1_SMN_C2PMSG_62
#define mmMP1_SMN_C2PMSG_62_BASE_IDX
#define mmMP1_SMN_C2PMSG_63
#define mmMP1_SMN_C2PMSG_63_BASE_IDX
#define mmMP1_SMN_C2PMSG_64
#define mmMP1_SMN_C2PMSG_64_BASE_IDX
#define mmMP1_SMN_C2PMSG_65
#define mmMP1_SMN_C2PMSG_65_BASE_IDX
#define mmMP1_SMN_C2PMSG_66
#define mmMP1_SMN_C2PMSG_66_BASE_IDX
#define mmMP1_SMN_C2PMSG_67
#define mmMP1_SMN_C2PMSG_67_BASE_IDX
#define mmMP1_SMN_C2PMSG_68
#define mmMP1_SMN_C2PMSG_68_BASE_IDX
#define mmMP1_SMN_C2PMSG_69
#define mmMP1_SMN_C2PMSG_69_BASE_IDX
#define mmMP1_SMN_C2PMSG_70
#define mmMP1_SMN_C2PMSG_70_BASE_IDX
#define mmMP1_SMN_C2PMSG_71
#define mmMP1_SMN_C2PMSG_71_BASE_IDX
#define mmMP1_SMN_C2PMSG_72
#define mmMP1_SMN_C2PMSG_72_BASE_IDX
#define mmMP1_SMN_C2PMSG_73
#define mmMP1_SMN_C2PMSG_73_BASE_IDX
#define mmMP1_SMN_C2PMSG_74
#define mmMP1_SMN_C2PMSG_74_BASE_IDX
#define mmMP1_SMN_C2PMSG_75
#define mmMP1_SMN_C2PMSG_75_BASE_IDX
#define mmMP1_SMN_C2PMSG_76
#define mmMP1_SMN_C2PMSG_76_BASE_IDX
#define mmMP1_SMN_C2PMSG_77
#define mmMP1_SMN_C2PMSG_77_BASE_IDX
#define mmMP1_SMN_C2PMSG_78
#define mmMP1_SMN_C2PMSG_78_BASE_IDX
#define mmMP1_SMN_C2PMSG_79
#define mmMP1_SMN_C2PMSG_79_BASE_IDX
#define mmMP1_SMN_C2PMSG_80
#define mmMP1_SMN_C2PMSG_80_BASE_IDX
#define mmMP1_SMN_C2PMSG_81
#define mmMP1_SMN_C2PMSG_81_BASE_IDX
#define mmMP1_SMN_C2PMSG_82
#define mmMP1_SMN_C2PMSG_82_BASE_IDX
#define mmMP1_SMN_C2PMSG_83
#define mmMP1_SMN_C2PMSG_83_BASE_IDX
#define mmMP1_SMN_C2PMSG_84
#define mmMP1_SMN_C2PMSG_84_BASE_IDX
#define mmMP1_SMN_C2PMSG_85
#define mmMP1_SMN_C2PMSG_85_BASE_IDX
#define mmMP1_SMN_C2PMSG_86
#define mmMP1_SMN_C2PMSG_86_BASE_IDX
#define mmMP1_SMN_C2PMSG_87
#define mmMP1_SMN_C2PMSG_87_BASE_IDX
#define mmMP1_SMN_C2PMSG_88
#define mmMP1_SMN_C2PMSG_88_BASE_IDX
#define mmMP1_SMN_C2PMSG_89
#define mmMP1_SMN_C2PMSG_89_BASE_IDX
#define mmMP1_SMN_C2PMSG_90
#define mmMP1_SMN_C2PMSG_90_BASE_IDX
#define mmMP1_SMN_C2PMSG_91
#define mmMP1_SMN_C2PMSG_91_BASE_IDX
#define mmMP1_SMN_C2PMSG_92
#define mmMP1_SMN_C2PMSG_92_BASE_IDX
#define mmMP1_SMN_C2PMSG_93
#define mmMP1_SMN_C2PMSG_93_BASE_IDX
#define mmMP1_SMN_C2PMSG_94
#define mmMP1_SMN_C2PMSG_94_BASE_IDX
#define mmMP1_SMN_C2PMSG_95
#define mmMP1_SMN_C2PMSG_95_BASE_IDX
#define mmMP1_SMN_C2PMSG_96
#define mmMP1_SMN_C2PMSG_96_BASE_IDX
#define mmMP1_SMN_C2PMSG_97
#define mmMP1_SMN_C2PMSG_97_BASE_IDX
#define mmMP1_SMN_C2PMSG_98
#define mmMP1_SMN_C2PMSG_98_BASE_IDX
#define mmMP1_SMN_C2PMSG_99
#define mmMP1_SMN_C2PMSG_99_BASE_IDX
#define mmMP1_SMN_C2PMSG_100
#define mmMP1_SMN_C2PMSG_100_BASE_IDX
#define mmMP1_SMN_C2PMSG_101
#define mmMP1_SMN_C2PMSG_101_BASE_IDX
#define mmMP1_SMN_C2PMSG_102
#define mmMP1_SMN_C2PMSG_102_BASE_IDX
#define mmMP1_SMN_C2PMSG_103
#define mmMP1_SMN_C2PMSG_103_BASE_IDX
#define mmMP1_SMN_ACTIVE_FCN_ID
#define mmMP1_SMN_ACTIVE_FCN_ID_BASE_IDX
#define mmMP1_SMN_IH_CREDIT
#define mmMP1_SMN_IH_CREDIT_BASE_IDX
#define mmMP1_SMN_IH_SW_INT
#define mmMP1_SMN_IH_SW_INT_BASE_IDX
#define mmMP1_SMN_IH_SW_INT_CTRL
#define mmMP1_SMN_IH_SW_INT_CTRL_BASE_IDX
#define mmMP1_SMN_FPS_CNT
#define mmMP1_SMN_FPS_CNT_BASE_IDX
#define mmMP1_SMN_EXT_SCRATCH0
#define mmMP1_SMN_EXT_SCRATCH0_BASE_IDX
#define mmMP1_SMN_EXT_SCRATCH1
#define mmMP1_SMN_EXT_SCRATCH1_BASE_IDX
#define mmMP1_SMN_EXT_SCRATCH2
#define mmMP1_SMN_EXT_SCRATCH2_BASE_IDX
#define mmMP1_SMN_EXT_SCRATCH3
#define mmMP1_SMN_EXT_SCRATCH3_BASE_IDX
#define mmMP1_SMN_EXT_SCRATCH4
#define mmMP1_SMN_EXT_SCRATCH4_BASE_IDX
#define mmMP1_SMN_EXT_SCRATCH5
#define mmMP1_SMN_EXT_SCRATCH5_BASE_IDX
#define mmMP1_SMN_EXT_SCRATCH6
#define mmMP1_SMN_EXT_SCRATCH6_BASE_IDX
#define mmMP1_SMN_EXT_SCRATCH7
#define mmMP1_SMN_EXT_SCRATCH7_BASE_IDX
#define mmMP1_SMN_EXT_SCRATCH8
#define mmMP1_SMN_EXT_SCRATCH8_BASE_IDX


// addressBlock: mp_SmuMp1Pub_CruDec
// base address:	0x0
#define mmMP1_SMN_PUB_CTRL
#define mmMP1_SMN_PUB_CTRL_BASE_IDX



#endif