linux/arch/x86/include/asm/i8259.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_X86_I8259_H
#define _ASM_X86_I8259_H

#include <linux/delay.h>
#include <asm/io.h>

extern unsigned int cached_irq_mask;

#define __byte(x, y) …
#define cached_master_mask …
#define cached_slave_mask …

/* i8259A PIC registers */
#define PIC_MASTER_CMD …
#define PIC_MASTER_IMR …
#define PIC_MASTER_ISR …
#define PIC_MASTER_POLL …
#define PIC_MASTER_OCW3 …
#define PIC_SLAVE_CMD …
#define PIC_SLAVE_IMR …
#define PIC_ELCR1 …
#define PIC_ELCR2 …

/* i8259A PIC related value */
#define PIC_CASCADE_IR …
#define MASTER_ICW4_DEFAULT …
#define SLAVE_ICW4_DEFAULT …
#define PIC_ICW4_AEOI …

extern raw_spinlock_t i8259A_lock;

/* the PIC may need a careful delay on some platforms, hence specific calls */
static inline unsigned char inb_pic(unsigned int port)
{ … }

static inline void outb_pic(unsigned char value, unsigned int port)
{ … }

extern struct irq_chip i8259A_chip;

struct legacy_pic { … };

void legacy_pic_pcat_compat(void);

extern struct legacy_pic *legacy_pic;
extern struct legacy_pic null_legacy_pic;

static inline bool has_legacy_pic(void)
{ … }

static inline int nr_legacy_irqs(void)
{ … }

#endif /* _ASM_X86_I8259_H */